Texas Instruments PCI7411 manuals
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Texas Instruments PCI7411 Manual
299 pages 1.26 Mb
3 Contents12 List of Illustrations13 List of Tables19 1 Introduction27 2 Terminal Descriptions57 3 Feature/Protocol Descriptions91 4 PC Card Controller Programming Model4.1 PCI Configuration Register Map (Functions 0 and 1)Table 42. Functions 0 and 1 PCI Configuration Register Map (Continued) 92 4.2 Vendor ID RegisterDefault: 104Ch Register: Vendor ID Offset: 00h (Functions 0, 1) 93 4.3 Device ID Register Functions 0 and 194 4.4 Command Register95 4.5 Status Register96 4.6 Revision ID Register4.7 Class Code Register 4.8 Cache Line Size Register 97 4.9 Latency Timer Register4.10 Header Type Register 4.11 BIST Register 98 4.12 CardBus Socket Registers/ExCA Base Address Register4.13 Capability Pointer Register 99 4.14 Secondary Status Register100 4.15 PCI Bus Number Register4.16 CardBus Bus Number Register 4.17 Subordinate Bus Number Register 101 4.18 CardBus Latency Timer Register4.19 CardBus Memory Base Registers 0, 1 102 4.20 CardBus Memory Limit Registers 0, 14.21 CardBus I/O Base Registers 0, 1 103 4.22 CardBus I/O Limit Registers 0, 14.23 Interrupt Line Register 104 4.24 Interrupt Pin RegisterRegister: Interrupt pin Offset: 3Dh 105 4.25 Bridge Control RegisterRegister: Bridge control Offset: 3Eh (Function 0, 1) Default: 0340h Table 47. Bridge Control Register Description 106 4.26 Subsystem Vendor ID Register107 4.27 Subsystem ID Register4.28 PC Card 16-Bit I/F Legacy-Mode Base-Address Register 108 4.29 System Control RegisterRegister: System control Offset: 80h (Functions 0, 1) Default: 0844 9060h Table 48. System Control Register Description Table 48.System Control Register Description (continued) 110 4.30 MC_CD Debounce RegisterDefault: 19h Register: MC_CD debounce Offset: 84h (Functions 0, 1) 111 4.31 General Control Register113 4.32 General-Purpose Event Status Register114 4.33 General-Purpose Event Enable Register4.34 General-Purpose Input Register 115 4.35 General-Purpose Output Register116 4.36 Multifunction Routing Status RegisterRegister: Multifunction routing status Offset: 8Ch Default: 0000 1000h Table 414. Multifunction Routing Status Register Description Table 414. Multifunction Routing Status Register Description (Continued) 117 4.37 Retry Status Register118 4.38 Card Control Register119 4.39 Device Control Register120 4.40 Diagnostic Register121 4.41 Capability ID Register4.42 Next Item Pointer Register 122 4.43 Power Management Capabilities Register123 4.44 Power Management Control/Status Register124 4.45 Power Management Control/Status Bridge Support Extensions Register4.46 Power-Management Data Register 125 4.47 Serial Bus Data Register4.48 Serial Bus Index Register 126 4.49 Serial Bus Slave Address Register127 4.50 Serial Bus Control/Status RegisterRegister: Serial bus control/status Offset: B3h (function 0) Type: Read-only, Read/Write, Read/Clear Table 425. Serial Bus Control/Status Register Description 129 5 ExCA Compatibility Registers (Functions 0 and 1)153 6 CardBus Socket Registers (Functions 0 and 1)161 7 OHCI Controller Programming Model181 8 OHCI Registers225 9 TI Extension Registers231 10 PHY Register Configuration239 11 Flash Media Controller Programming Model255 12 SD Host Controller Programming Model273 13 Smart Card Controller Programming Model291 14 Electrical Characteristics297 15 Mechanical InformationGHK (S-PBGA-N288) PLASTIC BALL GRID ARRAY 299 PACKAGE OPTION ADDENDUM
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