Texas Instruments PCI7611, PCI7411, PCI7621 1. Function 2 Configuration Register Map, Pmcsrbse

7 OHCI Controller Programming Model

This section describes the internal PCI configuration registers used to program the PCI7x21/PCI7x11 1394 open host controller interface. All registers are detailed in the same format: a brief description for each register is followed by the register offset and a bit table describing the reset state for each register.

A bit description table, typically included when the register contains bits of more than one type or purpose, indicates bit field names, a detailed field description, and field access tags which appear in the type column. Table 4−1 describes the field access tags.

The PCI7x21/PCI7x11 controller is a multifunction PCI device. The 1394 OHCI is integrated as PCI function 2. The function 2 configuration header is compliant with the PCI Local Bus Specification as a standard header. Table 7−1 illustrates the configuration header that includes both the predefined portion of the configuration space and the user-definable registers.

Table 7−1. Function 2 Configuration Register Map

	REGISTER NAME			OFFSET
Device ID		Vendor ID		00h
Status		Command		04h
	Class code		Revision ID	08h
BIST	Header type	Latency timer	Cache line size	0Ch
	OHCI base address			10h
	TI extension base address			14h
	CardBus CIS base address			18h
	Reserved			1Ch−27h
	CardBus CIS pointer ‡			28h
Subsystem ID ‡		Subsystem vendor ID ‡		2Ch
	Reserved			30h
			PCI power	34h
	Reserved		management
			capabilities pointer
	Reserved			38h
Maximum latency ‡	Minimum grant ‡	Interrupt pin	Interrupt line	3Ch
	PCI OHCI control			40h
Power management capabilities		Next item pointer	Capability ID	44h
PM data	PMCSR_BSE	Power management control and status ‡		48h
	Reserved			4Ch−EBh
	PCI PHY control ‡			ECh
	PCI miscellaneous configuration ‡			F0h
	Link enhancement control ‡			F4h
	Subsystem access ‡			F8h
	GPIO control			FCh

‡ One or more bits in this register are cleared only by the assertion of GRST.

7−1