Table 2−9. Multifunction and Miscellaneous Terminals

The power rail designation is not applicable for the multifunction and miscellaneous terminals.

 

TERMINAL

 

 

 

DESCRIPTION

I/O

INPUT

OUTPUT

PU/

EXTERNAL

PIN STRAPPING

 

NAME

 

NO.

 

 

TYPE

PD

COMPONENTS

(IF UNUSED)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E02

USB enable. These output terminals control an

 

 

 

 

 

 

A_USB_EN

 

 

 

 

 

 

 

 

external CBT switch for each socket when an USB

O

 

LVCO1

 

CBT switch

Float

B_USB_EN

 

E01

 

 

 

card is inserted into the socket.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CLK_48

 

M01

A 48-MHz clock must be connected to this terminal.

I

LVCI1

 

 

48 MHz clock

 

 

 

 

source

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MFUNC0

 

N03

 

 

 

 

 

 

 

I/O

PCII3

PCIO3

 

 

10-kto 47-k

 

 

 

 

 

 

 

 

 

 

pullup resistor

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MFUNC1

 

M05

 

 

 

 

 

 

 

I/O

PCII3

PCIO3

 

 

10-kto 47-k

 

 

 

 

 

 

 

 

 

 

pullup resistor

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MFUNC2

 

P01

 

 

 

 

 

 

 

I/O

PCII3

PCIO3

 

 

10-kto 47-k

 

 

 

 

 

 

 

 

 

 

pullup resistor

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Multifunction terminals 0−6. See Section 4.36,

 

 

 

 

 

 

MFUNC3

 

P02

I/O

PCII3

PCIO3

 

 

10-kto 47-k

 

Multifunction Routing Status Register, for

 

 

 

 

 

pullup resistor

 

 

 

 

 

 

 

configuration details.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MFUNC4

 

P03

I/O

PCII3

PCIO3

 

 

10-kto 47-k

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

pullup resistor

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MFUNC5

 

N05

 

 

 

 

 

 

 

I/O

PCII3

PCIO3

 

 

10-kto 47-k

 

 

 

 

 

 

 

 

 

 

pullup resistor

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MFUNC6

 

R01

 

 

 

 

 

 

 

I/O

PCII3

PCIO3

 

 

10-kto 47-k

 

 

 

 

 

 

 

 

 

 

pullup resistor

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NC

 

W17

Reserved. This terminal has no connection

 

 

 

 

 

Float

 

anywhere within the package.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PHY_TEST_

 

R17

PHY test pin. Not for customer use. It must be pulled

I

LVCI1

 

PD1

 

NA

MA

 

high with a 4.7-kresistor.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ring indicate out and power management event

 

 

 

 

 

 

RI_OUT/

 

 

 

 

 

 

Pullup resistor per

 

 

T03

output. This terminal provides an output for

O

 

LVCO2

 

NA

PME

 

 

 

PCI specification

 

 

ring-indicate or PME signals.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RSVD

 

T19

Reserved. This terminal has no connection

 

 

 

 

Float

 

anywhere within the package.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Serial clock. At

 

 

the SCL signal is sampled to

 

 

 

 

 

 

 

 

 

 

 

 

 

PRST,

 

 

 

 

 

 

 

 

 

 

 

 

 

determine if a two-wire serial ROM is present. If the

 

 

 

 

 

 

 

 

 

 

 

 

 

serial ROM is detected, then this terminal provides

 

 

 

 

Pullup resistor per

 

 

 

 

 

 

 

 

the serial clock signaling and is implemented as

 

 

 

 

I2C specification

Tie to GND if not

SCL

 

M03

open-drain. For normal operation (a ROM is

I/O

TTLI1

TTLO1

 

(value depends on

 

 

using EEPROM

 

 

 

 

 

 

 

implemented in the design), this terminal must be

 

 

 

 

EEPROM,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

pulled high to the ROM VDD with a 2.7-kresistor.

 

 

 

 

typically 2.7 k)

 

 

 

 

 

 

 

 

Otherwise, it must be pulled low to ground with a

 

 

 

 

 

 

 

 

 

 

 

 

 

220-resistor.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Serial data. This terminal is implemented as

 

 

 

 

Pullup resistor per

 

 

 

 

 

 

 

 

open-drain, and for normal operation (a ROM is

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

I2C specification

 

 

 

 

 

 

 

 

implemented in the design), this terminal must be

 

 

 

 

Tie to GND if not

SDA

 

M02

I/O

TTLI1

TTLO1

 

(value depends on

 

pulled high to the ROM VDD with a 2.7-kresistor.

 

using EEPROM

 

 

 

 

 

 

 

 

 

 

 

EEPROM,

 

 

 

 

 

 

 

Otherwise, it must be pulled low to ground with a

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

typically 2.7 k)

 

 

 

 

 

 

 

 

220-resistor.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Speaker output. SPKROUT is the output to the host

 

 

 

 

 

 

 

 

 

 

 

 

 

system that can carry SPKR or CAUDIO through the

 

 

 

 

10-kto 47-k

10-kto 47-k

SPKROUT

 

L07

controller from the PC Card interface. SPKROUT is

O

 

TTLO1

 

 

 

 

pulldown resistor

pulldown resistor

 

 

 

 

 

 

 

driven as the exclusive-OR combination of card

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SPKR//CAUDIO inputs.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Suspend.

 

 

protects the internal registers

 

 

 

 

 

 

 

 

 

 

 

 

 

SUSPEND

 

 

 

 

 

 

 

 

 

 

 

 

 

from clearing when the GRST or

PRST

signal is

 

 

 

 

10-kto 47-k

10-kto 47-k

SUSPEND

 

R02

I

PCII6

 

 

 

asserted. See Section 3.8.6, Suspend Mode, for

 

 

pullup resistor

pullup resistor

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

details.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Terminal TEST0 is used for factory test of the

 

 

 

 

 

 

TEST0

 

P12

controller and must be connected to ground for

I/O

LVCI1

 

PD1

 

Tie to GND

 

 

 

 

 

 

 

normal operation.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2−18

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Image 44
Texas Instruments PCI7411, PCI7611, PCI7621, PCI7421 manual 9. Multifunction and Miscellaneous Terminals, 18