11.20 Power Management Data Register

The power management bridge support extension register provides extended power-management features not applicable to the flash media controller; thus, it is read-only and returns 0 when read.

Bit

 

7

6

5

 

4

3

 

2

1

0

 

 

 

 

 

 

 

 

 

 

 

 

Name

 

 

 

 

Power management data

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Type

 

R

R

R

 

R

R

 

R

R

R

 

 

 

 

 

 

 

 

 

 

 

 

Default

 

0

0

0

 

0

0

 

0

0

0

 

 

 

 

 

 

 

 

 

 

 

 

Register:

Power management data

 

 

 

 

Offset:

4Bh

 

 

 

 

 

 

 

 

 

Type:

Read-only

 

 

 

 

 

 

Default:

00h

 

 

 

 

 

 

 

 

11.21 General Control Register

The general control register provides miscellaneous PCI-related configuration. See Table 11−14 for a complete description of the register contents.

Bit

 

7

6

5

4

 

3

2

1

0

 

 

 

 

 

 

 

 

 

 

Name

 

 

 

 

General control

 

 

 

 

 

 

 

 

 

 

 

 

 

Type

 

R

R

R

RW

 

RW

RW

RW

RW

 

 

 

 

 

 

 

 

 

 

 

Default

 

0

0

0

0

 

0

0

0

0

 

 

 

 

 

 

 

 

 

 

 

 

Register:

General control

 

 

 

 

 

Offset:

4Ch

 

 

 

 

 

 

 

 

Type:

Read/Write, Read-only

 

 

 

 

 

Default:

00h

 

 

 

 

 

 

 

 

 

 

Table 11−14. General Control Register

BIT

FIELD NAME

TYPE

 

 

 

 

DESCRIPTION

 

 

 

 

 

 

 

 

 

 

7

RSVD

R

Reserved. Bit 7 returns 0 when read.

 

 

 

 

 

 

 

 

6−5 ‡

INT_SEL

RW

Interrupt select. These bits are program the INTPIN register and set which interrupt output is used.

 

 

 

This field is ignored if one of the USE_INTx terminals is asserted.

 

 

 

 

 

 

 

 

 

 

 

00 =

INTA

 

 

 

 

 

 

 

01 = INTB

 

 

 

10 = INTC

 

 

 

11 = INTD

 

 

 

 

 

 

4 ‡

D3_COLD

RW

D3cold

 

 

support. This bit sets and clears the D3cold

 

support bit in the power management

PME

PME

 

 

 

capabilities register.

 

 

 

 

3

RSVD

R

Reserved. Bit 3 returns 0 when read.

 

 

 

 

2 ‡

SM_DIS

RW

SmartMedia disable. Setting this bit disables support for SmartMedia cards. The flash media

 

 

 

controller reports a SmardMedia card as an unsupported card if this bit is set. If this bit is set, then

 

 

 

all of the SM_SUPPORT bits in the socket enumeration register are 0.

 

 

 

 

1 ‡

MMC_SD_DIS

RW

MMC/SD disable. Setting this bit disables support for MMC/SD cards. The flash media controller

 

 

 

reports a MMC/SD card as an unsupported card if this bit is set. If this bit is set, then all of the

 

 

 

SD_SUPPORT bits in the socket enumeration register are 0.

 

 

 

 

0 ‡

MS_DIS

RW

Memory Stick disable. Setting this bit disables support for Memory Stick cards. The flash media

 

 

 

controller reports a Memory Stick card as an unsupported card if this bit is set. If this bit is set, then

 

 

 

all of the MS_SUPPORT bits in the socket enumeration register are 0.

 

 

 

 

 

 

 

 

 

 

One or more bits in this register are cleared only by the assertion of GRST.

11−13

Page 251
Image 251
Texas Instruments PCI7421, PCI7411 Power Management Data Register, Power management data, 14. General Control Register