Texas Instruments PCI7421, PCI7411, PCI7611, PCI7621 manual 19. Smart Card Terminals †

Table 2−19. Smart Card Terminals †

If any Smart Card terminal is unused, then the terminal may be left floating, except for SC_VCC_5V which must be connected to 5 V.

TERMINAL		DESCRIPTION	I/O	INPUT	OUTPUT	PU/	POWER	EXTERNAL
NAME	NO.		TYPE			PD	RAIL	PARTS
		Smart Card card detect. This input is asserted when Smart
SC_CD	L02		I	TTLI2		SW2	VCC
		Cards are inserted.
								22 kΩ resistor to
SC_CLK	K05	Smart Card clock. The controller drives a 3-MHz clock to the	O		PCIO8			GND
		Smart Card interface when enabled.						68 pF capacitor
								to GND
SC_DATA	L01	Smart Card data input/output	I/O	PCII5	PCIO5	SW3
		Smart Card overcurrent. This input comes from the Smart
SC_OC	L03		I	LVCI1		PU2	5 V
		Card power switch.
								Power switch or
SC_PWR_CTRL	L05	Smart Card power control for the Smart Card socket.	O		LVCO1			FET to turn on
								power to FM
								socket
		Smart Card function code. The controller does not support
SC_FCB	K02	synchronous Smart Cards as specified in ISO/IEC 7816-10,	I	PCII5	PCIO5	SW3
		and this terminal is in a high-impedance state.
SC_GPIO6	H03
SC_GPIO5	J06
SC_GPIO4	J01	Smart Card general-purpose I/O terminals. These signals
SC_GPIO3	J02	can be controlled by firmware and are used as control	I/O	TTLI2	TTLO2	SW2	5 V
		signals for an external Smart Card interface chip or level
SC_GPIO2	J03
		shifter.
SC_GPIO1	J05
SC_GPIO0	J07
SC_RFU	K01	Smart Card reserved. This terminal is in a high-impedance	I	PCII5	PCIO5	SW3	5 V
		state.
		Smart Card This signal starts and stops the Smart Card
SC_RST	K03	reset sequence. The controller asserts this reset when	O		PCIO6
		requested by the host.
SC_VCC_5V	K07	Smart Card power terminal	PWR					1 kΩ resistor to
								5 V

†These terminals are reserved for the PCI7421 and PCI7411 controllers.

2−29