Acer Altos R710 manual Checkpoint, Beep Code, Description

192		Appendix D: BIOS POST Checkpoint Codes
Checkpoint	Beep Code	Description
Code
68h		Enable external cache and CPU cache if
		present.
		Configure non-cacheable regions if neces-
		sary.
		NOTE: Hook routine must preserve DX,
		which carries the cache size to the Display-
		CacheSizeJ routine.
69h		Initialize the handler for SMM.
6Ah		Display external cache size on the screen if it
		is non-zero.
		NOTE: Hook routine must preserve DX,
		which carries the cache size from the cache-
		ConfigureJ routine.
6Bh		If CMOS is bad, load Custom Defaults from
		flash into CMOS. If successful, reboot.
6Ch		Display shadow message.
6Eh		Display the starting offset of the non-dis-
		posable segment of the BIOS.
70h		Check flags in CMOS and in the BIOS data
		area for errors detected during POST. Dis-
		play error messages on the screen.
72h		Check status bits to see if configuration
		problems were detected. If so, display error
		messages on the screen.
76h		Check status bits for keyboard-related fail-
		ures. Display error messages on the screen.
7Ch		Initialize the hardware interrupt vectors
		from 08 to 0F and from 70h to 77h. Also set
		the interrupt vectors from 60h to 66h to
		zero.
7Dh		Initialize Intelligent System Monitoring.