190 |
| Appendix D: BIOS POST Checkpoint Codes | |
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Checkpoint | Beep Code | Description | |
Code | |||
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49h |
| Perform these tasks: | |
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| 1. Size the PCI bus topology and set bridge | |
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| bus numbers | |
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| 2. Set the system max bus number | |
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| 3. Write a 0 to the command register of | |
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| every PCI device | |
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| 4. Write a 0 to all 6 base registers in every | |
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| PCI device | |
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| 5. Write a | |
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| PCI device | |
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| 6. Find all IOPs and initialize them. | |
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| |
4Ah |
| Initialize all video adapters in system. | |
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| |
4Bh |
| Initialize QuietBoot if it is installed. Enable | |
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| both keyboard and timer interrupts (IRQ0 | |
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| and IRQ1). If your POST tasks require inter- | |
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| rupts off, preserve them with a PUSHF and | |
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| CLI at the beginning and a POPF at the end. | |
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| If you change the PIC, preserve the existing | |
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| bits. | |
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| |
4Ch |
| Shadow video BIOS ROM if specified by | |
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| Setup, and CMOS is valid and the previous | |
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| boot was OK. | |
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4Eh |
| Display copyright notice. | |
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4Fh |
| Initialize MultiBoot. Allocate memory for | |
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| old and new MultiBoot history tables. | |
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50h |
| Display CPU type and speed. | |
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51h |
| Checksum CMOS and initialize each EISA | |
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| slot with data from the initialization data | |
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| block. | |
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52h |
| Verify keyboard reset. | |
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54h |
| Initialize keystroke clicker if not enabled in | |
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| Setup. | |
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55h |
| Enable USB devices. | |
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