98 | 5 BIOS setup |
Feature | Options | Help Text | Description |
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Cache L1 | N/A | N/A | Displays cache L1 size. |
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Cache L2 | N/A | N/A | Displays cache L2 size. |
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Cache L3 | N/A | N/A | Displays cache L3 size. |
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| Visible only if the pro- |
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| cessor contains an L3 |
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| cache. |
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CPU 2 |
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CPUID | N/A | N/A | Displays the CPUID of |
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| the processor. |
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Cache L1 | N/A | N/A | Displays cache L1 size. |
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Cache L2 | N/A | N/A | Displays cache L2 size. |
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Cache L3 | N/A | N/A | Displays cache L3 size. |
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| Visible only if the pro- |
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| cessor contains an L3 |
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| cache. |
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Processor Retest
Disabled | If enabled, all pro- |
Enabled | cessors will be acti- |
| vated and retested |
| on the next boot. |
| This option will be |
| automatically reset |
| to disabled on the |
| next boot. |
Rearms the processor sensors.
Only displayed if the Intel Management Module is present.
Max CPUID Value Limit
Disabled | This should be |
Enabled | enabled in order to |
| boot legacy OSes |
| that cannot sup- |
| port processors with |
| extended CPUID |
| functions. |
