Chapter 10. Statistics
Network Port Statistics Available on Front Panel
TSU Loop State
Current state of the incoming T1 circuit.
PRI Loop State
Current state of the PRI circuit (PRI only).
DBU Status
Current state of the incoming DBU circuit.
Signal State
Current state of the Network port (up or down).
Signal State Change
Number of changes in the signaling protocol state.
Signal Timeouts
Total T391 timeouts that have occurred since the last reset.
Signal Errors
Total signal frames received with PVC signaling protocol violations.
Frames In
Total received frames since last reset.
Frames Out
Total transmitted frames since last reset.
Errored Frames
Total errored frames received since last reset.
CRC Errors
Number of frames received with HDLC CRC violations.
Abort Frames
Total frames received without a closing flag.
Octet Align
Number of frames received with a bit count that does not fall on
TSU IQ+ User Manual |
