Cisco Systems RJ-45-to-AUX manual CEF Asic, Dcef

through which all switched ports communicate. The AXIS bus is a partially asynchronous time division multiplexed bus used for switching packets between heterogeneous LAN modules.

CEF ASIC

The Cisco Express Forwarding (CEF) ASIC and Distributed Cisco Express Forwarding (dCEF) ASIC are Cisco’s newest ASICs, found in Cisco’s lines of routers and switches. In Cisco’s switching line, you will find this ASIC available in the 8500 GSR and 12000 GSR series.

dCEF

The dCEF ASIC is a mode that can be enabled on line cards; this mode uses interprocess communication (IPC) to synchronize a copy of the Forwarding Information Base (FIB). This synchronization enables identical copies of the FIB and adjacency tables to be stored on the Versatile Interface Processor (VIP), GSR, or other line card. The line cards can then express forward between port adapters. This process relieves the Route Switch Processor (RSP) of its involvement. The Cisco 12000 series routers have dCEF enabled by default. This is valuable troubleshooting information, because when you view the router configuration, it does not indicate that dCEF is enabled.

The CEF ASIC (CEFA) is a small CPU−type silicon chip that makes sure Layer 3 packets have fair access to the switch’s internal memory. An internal CEFA search engine performs fast lookups using arbitration to make sure lookups have metered access to the ASIC. CEF’s features include optimized scalability and exceptional performance. Cisco has made an excellent component that fits well into large networks, particularly those using Web−based applications that like to eat up the available bandwidth in slower processed networks. Such applications include Voice over IP, multimedia, large graphics, and other critical applications.

The CEFA microcontroller is local to four ports on the Catalyst 8500 GSR series line module; it uses a round−robin approach for equal access to data traffic on each port. The CEF microprocessor also has the responsibility to forward system messages back to the centralized CPU. These messages can include such data as Bridge Protocol Data Units (BPDUs), routing protocol advertisements, Internet Protocol (IP) Address Resolution Protocol (ARP) frames, Cisco Discovery Protocol (CDP) packets, and control−type messages.

CEF is a very complex ASIC that is less CPU−intensive than fast−switching route caching (discussed later in this chapter). It allows more processing ability for other Layer 3 services such as Quality of Service (QoS) queuing, policy networking (including access lists), and higher data encryption and decryption. As a result, CEF offers a higher level of consistency and stability in very large networks. The FIB, which contains all the known routes to a destination, allows the switch to eliminate the route cache maintenance and fast switching or process switching that doesn’t scale well to large network routing changes.

The Routing Information Base (RIB) table is created first, and information from the routing table is forwarded to the FIB. The FIB is a highly optimized routing lookup algorithm. Through the use of prefix matching of the destination address, the FIB makes the process of looking up the destination in a large routing table occur much more quickly than the line−by−line lookup of the RIB.

The FIB maintains a copy of the forwarding information contained in the IP routing table based on the next−hop address. An adjacency table is then used to determine the next hop. The IP table is updated if routing or topology changes occur. Those changes are then recorded in the FIB, and the next hop is then recomputed by the adjacency table based on those changes. This process eliminates the need for fast or optimum switching (discussed later in this chapter) in previous versions of the IOS.

CEF allows you to optimize the resources on your switch by using multiple paths to load−balance traffic. You can configure per−destination or per−packet load balancing on the outbound interface of the switch:

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