NOTE: You can mix x4 and x8 DRAM based DIMMs to support RAS features. However, all guidelines for specific RAS features must be followed. x4 DRAM based DIMMs retain Single Device Data Correction (SDDC) in memory optimized (independent channel) mode. x8 DRAM based DIMMs require Advanced ECC mode to gain SDDC.
The following sections provide additional slot population guidelines for each mode:
Advanced ECC (lockstep)
Advanced ECC mode extends SDDC from x4 DRAM based DIMMs to both x4 and x8 DRAMs. This protects against single DRAM chip failures during normal operation.
The installation guidelines for memory modules are as follows:
•Memory modules must be identical in size, speed, and technology.
•DIMMs installed in memory sockets with white release levers must be identical and the same rule applies for sockets with black release levers. This ensures that identical DIMMs are installed in matched pair
NOTE: Advanced ECC with mirroring is not supported.
Memory optimized (independent channel) mode
This mode supports SDDC only for memory modules that use x4 device width, and this mode does not impose any specific slot population requirements.
Memory sparing
NOTE: To use memory sparing, this feature must be enabled in System Setup.
In this mode, one rank per channel is reserved as a spare. If persistent correctable errors are detected on a rank, the data from this rank is copied to the spare rank, and the failed rank is disabled.
With memory sparing enabled, the system memory available to the operating system is reduced by one rank per channel. For example, in a
NOTE: Memory sparing does not offer protection against a
NOTE: Both Advanced ECC/Lockstep and Optimizer modes support memory sparing.
Memory mirroring
Memory mirroring offers the strongest memory module reliability mode compared to all other modes, providing improved uncorrectable
The installation guidelines for memory modules are as follows
•Memory modules must be identical in size, speed, and technology.
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