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Tables |
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1 | Terminology | 13 | |
2 | Related Documents | 16 | |
3 | Processor DIMM Support by Product | 19 | |
4 | Supported UDIMM Module Configurations | 19 | |
5 | Supported | 20 | |
6 | DDR3 / DDR3L System Memory Timing Support | 20 | |
7 | PCI Express* Supported Configurations in Desktop Products | 23 | |
8 | Processor Supported Audio Formats over HDMI*and DisplayPort* | 35 | |
9 | Valid Three Display Configurations through the Processor | 36 | |
10 | DisplayPort and embedded DisplayPort* Resolutions for 1, 2, 4 Lanes – Link Data |
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| Rate of RBR, HBR, and HBR2 | 36 | |
11 | System States | 50 | |
12 | Processor Core / Package State Support | 50 | |
13 | Integrated Memory Controller States | 50 | |
14 | PCI Express* Link States | 50 | |
15 | Direct Media Interface (DMI) States | 51 | |
16 | G, S, and C Interface State Combinations | 51 | |
17 | D, S, and C Interface State Combination | 51 | |
18 | Coordination of Thread Power States at the Core Level | 53 | |
19 | Coordination of Core Power States at the Package Level | 56 | |
20 | Deepest Package | 59 | |
21 | Desktop Processor Thermal Specifications | 66 | |
22 | Thermal Test Vehicle Thermal Profile for Processor (PCG 2013D) | 67 | |
23 | Thermal Test Vehicle Thermal Profile for Processor (PCG 2013C) | 68 | |
24 | Thermal Test Vehicle Thermal Profile for Processor (PCG 2013B) | 69 | |
25 | Thermal Test Vehicle Thermal Profile for Processor (PCG 2013A) | 70 | |
26 | Digital Thermal Sensor (DTS) 1.1 Thermal Solution Performance Above TCONTROL | 73 | |
27 | Thermal Margin Slope | 74 | |
28 | Intel® Turbo Boost Technology 2.0 Package Power Control Settings | 80 | |
29 | Signal Description Buffer Types | 82 | |
30 | Memory Channel A Signals | 82 | |
31 | Memory Channel B Signals | 83 | |
32 | Memory Reference and Compensation Signals | 84 | |
33 | Reset and Miscellaneous Signals | 85 | |
34 | PCI Express* Graphics Interface Signals | 86 | |
35 | Display Interface Signals | 86 | |
36 | Direct Media Interface (DMI) – Processor to PCH Serial Interface | 86 | |
37 | Phase Locked Loop (PLL) Signals | 87 | |
38 | Testability Signals | 87 | |
39 | Error and Thermal Protection Signals | 88 | |
40 | Power Sequencing Signals | 88 | |
41 | Processor Power Signals | 89 | |
42 | Sense Signals | 89 | |
43 | Ground and | 89 | |
44 | Processor Internal | 89 | |
45 | Voltage Regulator (VR) 12.5 Voltage Identification | 91 | |
46 | Signal Groups | 95 | |
47 | Processor Core Active and Idle Mode DC Voltage and Current Specifications | 98 | |
48 | Memory Controller (VDDQ) Supply DC Voltage and Current Specifications | 99 | |
49 | VCCIO_OUT, VCOMP_OUT, and VCCIO_TERM | 100 | |
50 | DDR3 / DDR3L Signal Group DC Specifications | 100 | |
51 | Digital Display Interface Group DC Specifications | 101 | |
52 | embedded DisplayPort* (eDP*) Group DC Specifications | 102 | |
53 | CMOS Signal Group DC Specifications | 102 | |
Desktop 4th Generation Intel® Core™ Processor Family, Desktop Intel® Pentium® Processor Family, and Desktop Intel® Celeron® | |||
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| Processor Family | |
December 2013 | Datasheet – Volume 1 of 2 | ||
Order No.: |
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