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Intel BX80646I74770, CM8064601466200, CM8064601466003, BX80637I73770K manual Processor-Tables

Models: BX80633I74960X BX80646I34130 BX80646I54430 BX80646I74770K BX80646I74770 BX80646I54570S BX80646I74770S BXF80646I74770K CM8063701159502 CM8063701212200 BX80637I73770K CM8064601466003 CM8064601466200

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December 2013 Order No.: 328897-004

		Processor—Tables
54	GTL Signal Group and Open Drain Signal Group DC Specifications	102
55	PCI Express* DC Specifications	103
56	Platform Environment Control Interface (PECI) DC Electrical Limits	103
57	Processor Loading Specifications	106
58	Package Handling Guidelines	106
59	Processor Materials	107
60	Processor Storage Specifications	108
61	Processor Ball List by Signal Name	110

Desktop 4th Generation Intel® Core™ Processor Family, Desktop Intel® Pentium® Processor Family, and Desktop Intel® Celeron® Processor Family

Datasheet – Volume 1 of 2 8

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Intel BX80646I74770, CM8064601466200, CM8064601466003, BX80637I73770K, CM8063701212200, CM8063701159502 manual Processor-Tables

BX80633I74960X, BX80646I34130, BX80646I54430, BX80646I74770K, BX80646I74770 specifications

The Intel CM8063701159502, or BX80637I53470, is a powerful CPU designed for modern computing needs. This processor belongs to Intel's 4th generation of Core i5 processors, commonly known as "Haswell". It showcases Intel's commitment to enhancing performance, increasing energy efficiency, and delivering an enriching user experience.

One of the main features of the Intel Core i5-3470 is its quad-core architecture. This allows the processor to handle multiple threads simultaneously, making it adept at multitasking and running demanding applications efficiently. With a base clock speed of 3.2 GHz, it can boost up to 3.6 GHz using Intel’s Turbo Boost technology, providing additional power when needed for intensive tasks like gaming or video editing.

The Intel i5-3470 features Intel's HD Graphics 2500, which offers decent graphics performance for everyday tasks and casual gaming. This integrated graphics solution is capable of delivering high-definition visuals and supports DirectX 11, making it suitable for lightweight gaming experiences without the need for an additional dedicated graphics card.

Another standout characteristic of the BX80637I53470 is its support for Intel Smart Cache, which is an advanced caching technology. It provides a shared cache pool that enhances performance by reducing the time it takes to access frequently used data. This feature, coupled with Intel's instruction set architecture, allows for improved processing agility and efficiency across applications.

The processor is built on a 22nm manufacturing process, which results in reduced power consumption and heat generation compared to its predecessors. It has a thermal design power (TDP) of 77 watts, making it energy efficient while still delivering robust performance. Additionally, the Core i5-3470 supports DDR3 memory, with speeds up to 1600 MHz, enabling quick data retrieval and improved system responsiveness.

Security is another important aspect of the Intel i5-3470, featuring Intel Secure Key and Intel AES New Instructions (AES-NI), which protect sensitive data and enhance encryption performance.

In conclusion, the Intel CM8063701159502, or BX80637I53470, encapsulates modern computing technology with its powerful quad-core performance, integrated graphics, energy efficiency, and robust security features, making it a versatile choice for a wide range of computing tasks. Whether users are engaging in casual gaming, productivity tasks, or multimedia consumption, this processor demonstrates a solid balance of performance and efficiency, providing an excellent computing experience overall.

Contents

Datasheet - Volume 1 of December Datasheet - Volume 1 of 2 Contents 4.0 Power ManagementRevision History 1.0 Introduction 5.0 Thermal Management 6.0 Signal DescriptionProcessor-Contents 7.0 Electrical Specifications 8.0 Package Mechanical Specifications9.0 Processor Ball and Signal Information 7.8.1 Platform Environment Control Interface PECI DC Characteristics Figures Tables Tables-Processor Processor-Tables Revision History Revision History-Processor 1.0 Introduction Processor-Introduction Figure 1. Platform Block Diagram 1.1 Supported TechnologiesProcessor Platform Controller Hub PCH 1.3 Power Management Support 1.2 InterfacesProcessor Core System 1.4 Thermal Management Support 1.5 Package Support1.6 Terminology Terminology with Virtual Machine Monitor software, enables multiple, robust independent software Introduction-Processor 1.7 Related Documents Related DocumentsDocument Number / Location specifications httpproducts/processor manuals/index.htm 2.0 Interfaces 2.1 System Memory Interface Processor DIMM Support by Product Supported UDIMM Module Configurations2.1.1 System Memory Technology Supported DDR3 / DDR3L System Memory Timing Support Supported SO-DIMM Module Configurations AIO Only2.1.2 System Memory Timing Support 2.1.3 System Memory Organization Modes Single-Channel ModeDual-Channel Mode - Intel Flex Memory Technology Mode Figure 2. Intel Flex Memory Technology Operations 2.1.3.2 Intel Fast Memory Access Intel FMA Technology Enhancements Just-in-Time Command SchedulingCommand Overlap 2.1.3.1 System Memory Frequency Table 7. PCI Express* Supported Configurations in Desktop Products 2.2 PCI Express* Interface2.2.1 PCI Express* Support 2.1.3.3 Data Scrambling 2.2.3 PCI Express* Configuration Mechanism 2.2.2 PCI Express* Architecture PCI Express* Lanes Connection PCI Express* Related Register Structures in the ProcessorPCI Express* Port 2.3 Direct Media Interface DMI Figure 4. PCI Express* Typical Operation 16 Lanes Mapping1 X 4 Controller 1 X 8 Controller DMI Error Flow DMI Link Down 2.4 Processor Graphics 2.5 Processor Graphics Controller GT Figure 5. Processor Graphics Controller Unit Block Diagram 2.5.1 3D and Video Engines for Graphics Processing3D Pipeline 3D Engine Execution Units Vertex Shader VS Stage Geometry Shader GS StageClip Stage Strips and Fans SF Stage Logical 128-Bit Fixed BLT and 256 Fill Engine 2.6 Digital Display Interface DDI2.5.2 Multi Graphics Controllers Multi-Monitor Support Figure 6. Processor Display Architecture Source Device Sink DeviceDisplayPort Figure 7. DisplayPort* Overview HDMI Source HDMI SinkFigure 8. HDMI* Overview HDMI Tx Multiple Display Configurations embedded DisplayPortIntegrated Audio Table 8. Processor Supported Audio Formats over HDMI*and DisplayPort Valid Three Display Configurations through the Processor High-bandwidth Digital Content Protection HDCP 2.8.1 PECI Bus Architecture 2.7 Intel Flexible Display Interface Intel FDI2.8 Platform Environmental Control Interface PECI Figure 9. PECI Host-Clients Connection Example PECIHost / Originator PECI Client 3.0 Technologies 3.1 Intel Virtualization Technology Intel VTIntel VT-x Objectives ing=VT Intel VT-x Features Intel VT-d Objectives Intel VT-d Features Figure 10. Device to Domain Mapping Structures 3.2 Intel Trusted Execution Technology Intel TXT 3.3 Intel Hyper-Threading Technology Intel HT Technology Intel Turbo Boost Technology 2.0 Frequency 3.4 Intel Turbo Boost Technology3.5 Intel Advanced Vector Extensions 2.0 Intel AVX2 Intel Secure Key 3.6 Intel Advanced Encryption Standard New Instructions Intel AES-NIPCLMULQDQ Instruction 3.8 Intel 64 Architecture x2APIC 3.11 Supervisor Mode Execution Protection SMEP 3.9 Power Aware Interrupt Routing PAIR3.10 Execute Disable Bit 4.0 Power Management Figure 11. Processor Power StatesNote Power states availability may vary between the different SKUs S0 - Processor Fully powered on full on mode / connected standby mode 4.1 Advanced Configuration and Power Interface ACPI States Supported System StatesProcessor Core / Package State Support Integrated Memory Controller States 4.2 Processor Core Power Management 4.2.1 Enhanced Intel SpeedStep Technology Key FeaturesDirect Media Interface DMI States G, S, and C Interface State Combinations 4.2.2 Low-Power Idle States Figure 12. Idle Power Management Breakdown of the Processor CoresThread Core 0 State Figure 13. Thread and Core C-State Entry and Exit 4.2.3 Requesting Low-Power Idle StatesCoordination of Thread Power States at the Core Level 4.2.4 Core C-State Rules Core C0 StateCore C1/C1E State Core C3 State 4.2.5 Package C-States Core C6 StateCore C7 State C-State Auto-Demotion Coordination of Core Power States at the Package Level Package C1/C1E State Figure 14. Package C-State Entry and ExitPackage C0 State Package C2 State Package C3 StatePackage C6 State Package C7 State 4.2.6 Package C-States and Display Resolutions Deepest Package C-State Available 4.3 Integrated Memory Controller IMC Power Management 4.3.1 Disabling Unused System Memory Outputs 4.3.2 DRAM Power Management and Initialization No power-down CKE disable 4.3.2.2 Conditional Self-Refresh 4.3.2.3 Dynamic Power-Down4.3.2.1 Initialization Role of CKE 4.4 PCI Express* Power Management 4.5 Direct Media Interface DMI Power Management4.3.3 DRAM Running Average Power Limitation RAPL 4.3.4 DDR Electrical Power Gating EPG 4.6 Graphics Power Management 4.6.1 Intel Rapid Memory Power Management Intel RMPM4.6.2 Graphics Render C-State 4.6.3 Intel Graphics Dynamic Frequency 5.0 Thermal Management Thermal Management-Processor Desktop Processor Thermal Specifications 5.1 Desktop Processor Thermal ProfilesProcessor-Thermal Management Profile 5.1.1 Processor PCG 2013D Thermal Profile TCASE = 0.33 * Power +TTV Power W Case 5.1.2 Processor PCG 2013C Thermal Profile 5.1.3 Processor PCG 2013B Thermal Profile 5.1.4 Processor PCG 2013A Thermal Profile 5.2 Thermal Metrology 5.3 Fan Speed Control Scheme with Digital Thermal Sensor DTSMeasure TCASE at the geometric center of the package 37.5 37.5 Figure 20. Digital Thermal Sensor DTS 1.1 Definition Points ΨCA = TCASE-MAX - TAMBIENT-TARGET / TDP 5.4 Fan Speed Control Scheme with Digital Thermal Sensor DTS Thermal Margin Slope 5.5 Processor TemperatureFigure 21. Digital Thermal Sensor DTS Thermal Profile Definition 5.6 Adaptive Thermal Monitor Frequency Control Critical Temperature Flag Clock ModulationImmediate Transition to Combined TM1 and TM2 PROCHOT# Signal 5.7 THERMTRIP# Signal 5.8 Digital Thermal Sensor 5.8.1 Digital Thermal Sensor Accuracy Taccuracy 5.9.1 Intel Turbo Boost Technology Power Control and Reporting5.9 Intel Turbo Boost Technology Thermal Considerations 5.9.2 Package Power Control Intel Turbo Boost Technology 2.0 Package Power Control Settings Figure 22. Package Power Control 5.9.3 Turbo Time Parameter 6.0 Signal Description 6.1 System Memory Interface SignalsSignal Description Buffer Types Memory Channel A Signals Memory Channel B Signals Signal Description-Processor 6.2 Memory Reference and Compensation Signals Memory Reference and Compensation SignalsDDR3/DDR3L Reference Voltage This signal is used as System Memory Impedance Compensation 6.3 Reset and Miscellaneous Signals Reset and Miscellaneous SignalsCFG3 MSR Privacy Bit Feature CFG65 PCI Express* Bifurcation 6.4 PCI Express*-Based Interface Signals 6.5 Display Interface SignalsPCI Express* Graphics Interface Signals Display Interface Signals 6.7 Phase Locked Loop PLL Signals 6.8 Testability SignalsPhase Locked Loop PLL Signals Testability Signals 6.9 Error and Thermal Protection Signals 6.10 Power Sequencing SignalsError and Thermal Protection Signals Power Sequencing Signals 6.11 Processor Power Signals 6.12 Sense Signals6.13 Ground and Non-Critical to Function NCTF Signals Processor Power Signals 7.0 Electrical Specifications 7.2 Power and Ground Lands7.1 Integrated Voltage Regulator 7.3 VCC Voltage Identification VID Table 45. Voltage Regulator VR 12.5 Voltage Identification Electrical Specifications-Processor continued Processor-Electrical Specificationscontinued continued Electrical Specifications-Processorcontinued Processor-Electrical Specifications Signal Groups 7.4 Reserved or Unused Signals7.5 Signal Groups DDR3 / DDR3L Data Signals DDR3 / DDR3L Reference Voltage SignalsPower / Ground / Other DDR3 / DDR3L Compensation 7.6 Test Access Port TAP Connection 7.7 DC SpecificationsPCI Express* Graphics Digital Media Interface DMI 7.8 Voltage and Current Specifications Electrical Specifications-Processor DDR3 / DDR3L Signal Group DC Specifications VCCIOOUT, VCOMPOUT, and VCCIOTERM Digital Display Interface Group DC Specifications GTL Signal Group and Open Drain Signal Group DC Specifications embedded DisplayPort* eDP* Group DC SpecificationsCMOS Signal Group DC Specifications 7.8.1 Platform Environment Control Interface PECI DC Characteristics PCI Express* DC Specifications 7.8.2 Input Device Hysteresis Figure 23. Input Device Hysteresis 8.0 Package Mechanical Specifications 8.2 Package Loading SpecificationsFigure 24. Processor Package Assembly Sketch 8.1 Processor Component Keep-Out Zone 8.4 Package Insertion Specifications 8.5 Processor Mass SpecificationProcessor Loading Specifications 8.3 Package Handling Guidelines 8.7 Processor Markings 8.8 Processor Land CoordinatesProcessor Materials Figure 25. Processor Top-Side Markings Figure 26. Processor Package Land Coordinates 8.9 Processor Storage SpecificationsProcessor Storage Specifications RHsustained storage TIMEsustained storage 9.0 Processor Ball and Signal Information Processor Ball List by Signal Name Processor Ball and Signal Information-Processor Processor-Processor Ball and Signal Information Signal Name Signal NameSignal Name Ball # Signal Name Signal NameSignal Name Ball # Signal Name AU20 Signal Name Signal NameSignal Name Ball # Signal Name Signal NameSignal Name Ball # Signal Name Signal NameSignal Name Ball # Signal Name Signal NameSignal Name Ball #

Processor—Tables

BX80633I74960X, BX80646I34130, BX80646I54430, BX80646I74770K, BX80646I74770 specifications