6.9Error and Thermal Protection Signals
December 2013 Order No.: 328897-004

Processor—Signal Description

6.9Error and Thermal Protection Signals

Table 39.

Error and Thermal Protection Signals

 

 

 

 

 

 

Signal Name

Description

Direction / Buffer

 

 

 

Type

 

 

 

 

 

 

Catastrophic Error: This signal indicates that the system has

 

 

 

experienced a catastrophic error and cannot continue to

 

 

 

operate. The processor will set this for non-recoverable

O

 

CATERR#

machine check errors or other unrecoverable internal errors.

 

GTL

 

 

CATERR# is used for signaling the following types of errors:

 

 

 

 

 

Legacy MCERRs, CATERR# is asserted for 16 BCLKs. Legacy

 

 

 

IERRs, CATERR# remains asserted until warm or cold reset.

 

 

 

 

 

 

 

Platform Environment Control Interface: A serial

I/O

 

PECI

sideband interface to the processor, it is used primarily for

Asynchronous

 

 

thermal, power, and error management.

 

 

 

 

 

 

 

Processor Hot: PROCHOT# goes active when the processor

GTL Input

 

 

temperature monitoring sensor(s) detects that the processor

Open-Drain Output

 

PROCHOT#

has reached its maximum safe operating temperature. This

 

 

indicates that the processor Thermal Control Circuit (TCC) has

 

 

 

 

 

 

been activated, if enabled. This signal can also be driven to

 

 

 

the processor to activate the TCC.

 

 

 

 

 

 

 

Thermal Trip: The processor protects itself from catastrophic

O

 

 

overheating by use of an internal thermal sensor. This sensor

Asynchronous OD

 

THERMTRIP#

is set well above the normal operating temperature to ensure

Asynchronous CMOS

 

that there are no false trips. The processor will stop all

 

 

 

execution when the junction temperature exceeds

 

 

 

approximately 130 °C. This is signaled to the system by the

 

 

 

THERMTRIP# pin.

 

 

 

 

 

6.10Power Sequencing Signals

Table 40.

Power Sequencing Signals

 

 

 

 

 

 

Signal Name

Description

Direction / Buffer

 

 

 

Type

 

 

 

 

 

SM_DRAMPWROK

SM_DRAMPWROK Processor Input: This signal

I

 

connects to the PCH DRAMPWROK.

Asynchronous CMOS

 

 

 

 

 

 

 

 

The processor requires this input signal to be a clean

 

 

 

indication that the VCC and VDDQ power supplies are

 

 

 

stable and within specifications. This requirement

 

 

 

applies regardless of the S-state of the processor.

I

 

PWRGOOD

'Clean' implies that the signal will remain low (capable

 

Asynchronous CMOS

 

 

of sinking leakage current), without glitches, from the

 

 

 

 

 

time that the power supplies are turned on until the

 

 

 

supplies come within specification. The signal must

 

 

 

then transition monotonically to a high state.

 

 

 

 

 

 

 

SKTOCC# (Socket Occupied)/PROC_DETECT#:

 

 

 

(Processor Detect): This signal is pulled down

 

 

SKTOCC#

directly (0 Ohms) on the processor package to ground.

 

There is no connection to the processor silicon for this

 

 

 

 

 

signal. System board designers may use this signal to

 

 

 

determine if the processor is present.

 

 

 

 

 

Desktop 4th Generation Intel® CoreProcessor Family, Desktop Intel® Pentium® Processor Family, and Desktop Intel® Celeron® Processor Family

Datasheet – Volume 1 of 2 88

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Intel BX80646I54430 manual Error and Thermal Protection Signals, Power Sequencing Signals, Processor-Signal Description

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