2

VMEchip2

DMAC Ton/Toff Timers and VMEbus Global Time-out Control Register

ADR/SIZ

 

 

 

 

$FFF4004C (8 bits of 32)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BIT

23

 

22

 

21

20

 

19

 

18

17

 

16

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NAME

 

TIME OFF

 

 

TIME ON

 

 

VGTO

 

 

 

 

 

 

 

 

 

 

 

OPER

 

 

R/W

 

 

 

R/W

 

 

R/W

 

 

 

 

 

 

 

 

 

 

 

RESET

 

 

0 PS

 

 

 

0 PS

 

 

0 PS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

This register controls the DMAC time off timer, the DMAC time on timer, and the VMEbus global time-out timer.

VGTO

These bits define the VMEbus global time-out value.

 

When DS0 or DS1 is asserted on the VMEbus, the timer

 

begins timing. If the timer times out before the data

 

strobes are removed, a BERR signal is sent to the

 

VMEbus. The global time-out timer is disabled when the

 

VMEchip2 is not system controller.

 

0

8

μs

 

 

 

1

64

μs

 

 

 

2

256

μs

 

 

 

3

The timer is disabled

 

TIME ON

These bits define the maximum time the DMAC spends

 

on the VMEbus:

 

 

 

0

16

μs

4

256 μs

 

1

32

μs

5

512 μs

 

2

64

μs

6

1024 μs

 

3

128

μs

7

When done (or no data)

TIME OFF These bits define the minimum time the DMAC spends off the VMEbus:

0

0

μs

4

128

μs

1

16

μs

5

256

μs

2

32

μs

6

512

μs

3

64

μs

7

1024

μs

2-66

Computer Group Literature Center Web Site

Page 144
Image 144
Motorola MVME172 manual Vgto, Time on