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MC2 Chip

Prescaler Clock Adjust Register

This register adjusts the prescaler so that it maintains a 1 MHz clock source for the tick timers. To provide a 1 MHz clock, the prescaler adjust register should be programmed based on the following equation:

Prescaler Clock Adjust Register = 256 - processor clock (MHz)

For example, for operation at 20 MHz the prescaler value is $EC, at 25 MHz it is $E7, and at 33 MHz it is $DF.

Non-integer processor clocks introduce an error into the specified times for the tick timers. The tick timer clock can be derived by the following equation:

Tick clock = processor clock / (256 - Prescaler Value)

The maximum clock frequency for the tick timers is the processor clock divided by two. The value $FF is not allowed to be programmed into this register. If a write with the value of $FF occurs to this register, the cycle terminates correctly but the register remains unchanged.

ADR/SIZ

 

$FFF42014 (8 bits)

 

 

 

 

 

BIT

23

...

16

 

 

 

 

NAME

 

Prescaler Clock Adjust

 

 

 

 

 

OPER

 

R/W

 

 

 

 

 

RESET

 

$DF P

 

 

 

 

 

Tick Timer 1 and 2 Control Registers

Each tick timer has a control register. The control registers for timers one and two are defined in this section. Control registers for timers three and four are described in a later section.

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Image 206
Motorola MVME172 manual Prescaler Clock Adjust Register, Tick Timer 1 and 2 Control Registers