Motorola MVME172 manual Detailed I/O Memory Maps

Memory Maps

Detailed I/O Memory Maps

Tables 1-7 through 1-17 give the detailed memory maps for:

VMEchip2	Table 1-7
MC2 chip	Table 1-8
IP2 chip	Table 1-9
IP2 chip Control and Status Registers	Table 1-10
MCECC chip	Table 1-11
Z85230 SCC Register addresses	Table 1-12
82596CA Ethernet LAN chip	Table 1-13
53C710 SCSI chip	Table 1-14
MK48T58 BBRAM/TOD clock	Table 1-15
BBRAM configuration area	Table 1-16
TOD clock	Table 1-17

Note Manufacturers’ errata sheets for the various chips are available by contacting your local Motorola sales representative. A non-disclosure agreement may be required.

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