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Siemens S7-300 appendix Routing network nodes MPI DP Ethernet, Number of routed connections, 2 DP

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Communication

3.2 Communication services

Routing network nodes: MPI – DP - Ethernet

CPU 1

(e.g. 315-2 DP)


	MPI		DP


			(master)

CPU 2

(317-2 PN/DP)

	MPI/DP		PN

(active slave)

CPU 3

(317-2 PN/DP)

PN

Subnet 2 (PROFIBUS)

Subnet 3 (PROFInet)

Subnet 1 (MPI)

PG

Number of routed connections

The CPUs with DP interface provide a different number of connections for the routing function:

Table 3-5	Number of routing connections for DP CPUs

CPU		As of firmware version	Number of connections for routing
31xC, CPU 31x		2.0.0	Max. 4
317-2 DP		2.1.0	Max. 8
31x-2 PN/DP		2.2.0	Interface X1 configured as:
			•	MPI: Max. 10
			• DP master Max. 24
			• DP slave (active): Max. 14
			Interface X2 configured as:
			•	PROFINET Max. 24

3-12	CPU 31xC and CPU 31x, Technical data
	Manual, Edition 08/2004, A5E00105475-05

Image 40

Siemens S7-300 appendix Routing network nodes MPI DP Ethernet, Number of routed connections, 2 DP, 317-2 PN/DP

Contents

Edition 08/2004 ManualPreface Safety Guidelines Purpose of the Manual Required basic knowledgeArea of application Iii Approvals CE labelTick mark Standards Documentation classification This manual is part of the S7-300 documentation package Recycling and Disposal Additional information required Table of contents Table of contents Index-1 Tables Retentivity of the RAM Table A-1 Xii Overview Selecting and configuringInformation on Is available Guide to the S7-300 documentation CPU performance Programming Manual From Profibus DP to Profinet Operating and display elements of CPU 31xC Operating and display elements CPU 31xCX11 X12 Slot for the Simatic Micro Memory Card MMC Integrated I/Os of CPU 31xC CPU 314C-2 PtP, for example Mode selector switch Power supply connectionReference Differences between the CPUs Status and Error Indicators CPU 31xC LED designation Color Meaning Operating and display elements CPU 312, 314, 315-2 DP Operating and display elements CPUOperating and display elements Mode selector switch is used to set the CPU operating mode Operating and display elements CPU 317-2 DP Use the mode selector switch to set the CPU operating mode Operating and display elements CPU 31x-2 PN/DP Slot for the Simatic Micro Memory Card MMC General status and error displays Status and error displays of the CPUDisplays for the X1 and X2 interfaces CPU 31xC and CPU 31x, Technical data Interfaces Multi-Point Interface MPIAvailability Properties Devices capable of MPI communication Operating modes for CPUs with two DP interfacesS7-300 / S7-400 with MPI interface S7-200 19.2 kbps only MPI/DP interface Profibus DP interface Devices capable of Profibus DP communication Connecting to Industrial EthernetRequirements Devices capable of Profinet PN communication Properties of Profinet interfaceSee also Profinet IO System Point to Point PtP Transmission rateDrivers Devices capable of PtP communication Communication services Overview of communication servicesSelecting the communication service Overview of communication services OP communication PG communicationData exchanged by means of S7 basic communication Use in server mode for Configuration5 S7 communication Use as client Reduction ratio Global data communication MPI onlySend and receive conditions Routing GD resources of the CPUsCPU 315-2 DP 315-2 PN/DP Routing network nodes MPI DP Routing network nodes MPI DP Ethernet Number of routed connections2 DP 317-2 PN/DP Requirements Configuration in Step Real installationRouting Example of a TeleService application PtP communication What is PROFINET?? Data consistencyCommunication via Profinet only CPU 31x-2 PN/DP With PUT/GET functions Objectives in Profinet What is Profinet CBA Component based Automation?Implementation of Profinet by us Further Information Extent of Profinet CBA and Profinet IO,2DWD9LHZ 352,17,2 Following graphic shows the new functions of Profinet IO Profinet IO System Extended Functions of Profinet IOGraphic displays Compatibility of the New Blocks Blocks in Profinet IO Chapter ContentProfinet PN Blocks New Detailed Information Compatibility of the new SSLs System status lists SSLs in Profinet IO Chapter ContentApplicability How to use open IE communication Data block for the configuration of the connectionOpen communication via Industrial Ethernet Requirements Functionality Disconnecting Establishing a connection for communicationData exchange Communication interruptions S7 connections Snmp communication service Availability1 S7 connection as communication path Reservation during configuration Assignment of S7 connectionsConnection points Transition point Allocating connection resources to Ocms services Assigning connections in the programTime sequence for allocation of S7 connection resources Example Distribution and availability of S7 connection resources Communication service DistributionDistribution of connection resources Availability of connection resources Total number Reserved for Free Connection S7 connectionsS7 basic Resources Connection resources for routing Number of connection resources for routingExample of a CPU 314C-2 DP Example for a CPU 317-2 PN/DP Requirement for using the DPV1 functionality with DP slaves DPV1Definition DPV1 Extended functions of DPV1 Interrupt blocks with DPV1 functionality System blocks with DPV1 functionalityProfibus DP Functionality Communication 3.4 DPV1 Memory areas and retentivity CPU memory areasThree memory areas of your CPU Load memory Retentivity of the load memory, system memory and RAM System memoryRAM Retentive data in load memory Retentivity of memory objects Retentive data in RAMRetentive behavior of memory objects Retentive behavior of a DB for CPUs with firmware Retentive behavior of a DB for CPUs with firmware = RUN-STOP Address areas of system memory Address areas of system memoryProcess image Address areas Description Process image update Time Configurable process image with CPU317 FW V2.3.0 or higher Local data Retentivity of the load memory, system memory and RAM MMC as memory module for the CPU Properties of the Micro Memory Card MMCProperties of an MMC MMC copy protection Useful life of an MMC Memory functions General Memory functionsLoading user program from Micro Memory Card MMC to the CPU Memory functions Download of new blocks or delta downloads Handling with modulesUploading blocks CPU memory reset and restart CPU memory resetDeleting blocks Compressing blocks Restart warm start Recipes IntroductionProcessing sequence Recipe Recipe n Memory concept Memory functions Measured values Measured value log filesWorking memory Evaluation of measured values Backup of project data to a Micro Memory Card MMC Function principle Memory concept Memory functions Reference Cycle time OverviewReference Execution time Cycle time OverviewMeaning of the term cycle time Time slice model Time slices 1 ms each Sequence of cyclic program processingStep Sequence Extending the cycle time Process image update Calculating the cycle time Extending the user program processing time + 60 μs per rackConst Portions CPU Factor Process Diagnostic Time-of-day Cycle control at the scan cycle check point CCPWatchdog Interrupt Extension of the cycle time due to error Programming errors Access errorsDifferent cycle times Block processing times may fluctuate Communication load Maximum cycle timeExample 20 % communication load Example 50 % communication load Influence on the physical cycle time Physical cycle time depending on communication loadTips Configuration during parameter assignment Cycle extension through component-based automation CBARuntimes Extending the OB1 cycle time Profibus Base load through Profibus devices Additional marginal conditionsTips and notes Update times for Profinet IO Response timeDefinition of response time Fluctuation width DP cycle times in the Profibus DP network 17 ms Shortest response time Conditions for the shortest response timeCalculation Shortest response time is the sum Delay of inputs + DP cycle time at Profibus DP Delay of outputs + DP cycle time at Profibus DPLongest response time Conditions for the longest response time Reducing the response time with direct I/O access Reducing the response timeLongest response time is the sum Shortest response time Longest response time Cycle time Calculating method for calculating the cycle/response timeCycle extension through component-based automation CBA Response time Shortest response time Longest response time Interrupt response time Process/diagnostic interrupt response times of the CPUsDefinition of interrupt response time Signal modules Tv 200 μs + 1000 μs x n% Reproducibility of delay interrupts and watchdog interrupts Process interrupt processingDefinition of Reproducibility Reproducibility Sample calculations Example of cycle time calculation Sample of response time calculation Calculating the longest response time Calculation of the longest response time Example of interrupt response time calculation Cycle and reaction times 5.6 Sample calculations General technical data Dimensions of CPU 31xCWidth of CPU Width Technical data of the Micro Memory Card MMC Plug-in Simatic Micro Memory CardsMaximum number of loadable blocks in the MMC Following memory modules are available Technical data CPU 312C Data areas and their retentivity Technical dataAddress areas I/O S7 signaling functions Technical data AssemblyTesting and commissioning functions Communication functions Interfaces 1st interface Technical data Functionality DimensionsProgramming Integrated functions Technical data of CPU 31xC 6.3 CPU 313C CPU 313C Technical data Timers/counters and their retentivity Technical data Address areas I/O Technical data MPI Technical data Integrated I/O KHz see the Manual Technological Functions Technical data CPU 313C-2 PtP CPU 313C-2 DP CPU and version CPU 313C-2 PtP and CPU 313C-2 DPMemory CPU 313C-2 PtP CPU 313C-2 DP Execution times CPU 313C-2 PtP CPU 313C-2 DP Blocks CPU 313C-2 PtP CPU 313C-2 DP Assembly CPU 313C-2 PtP CPU 313C-2 DPAddress areas I/O CPU 313C-2 PtP CPU 313C-2 DP S7 signaling functions CPU 313C-2 PtP CPU 313C-2 DP Technical data CPU 313C-2 PtP CPU 313C-2 DPTime-of-day CPU 313C-2 PtP CPU 313C-2 DP Interfaces CPU 313C-2 PtP CPU 313C-2 DP 1st interface DP master Technical data CPU 313C-2 PtP CPU 313C-2 DP DP slave GSD filePoint-to-point communication Programming CPU 313C-2 PtP CPU 313C-2 DP Dimensions CPU 313C-2 PtP CPU 313C-2 DP Voltages and currents CPU 313C-2 PtP CPU 313C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DP CPU and version CPU 314C-2 PtP and CPU 314C-2 DPMemory CPU 314C-2 PtP CPU 314C-2 DP Execution times CPU 314C-2 PtP CPU 314C-2 DP Blocks CPU 314C-2 PtP CPU 314C-2 DP Assembly CPU 314C-2 PtP CPU 314C-2 DPAddress areas I/O CPU 314C-2 PtP CPU 314C-2 DP S7 signaling functions CPU 314C-2 PtP CPU 314C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DPTime-of-day CPU 314C-2 PtP CPU 314C-2 DP Interfaces CPU 314C-2 PtP CPU 314C-2 DP 1st interface 2nd interface CPU 314C-2 PtP CPU 314C-2 DP Programming CPU 314C-2 PtP CPU 314C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DP DP slaveIntegrated I/O CPU 314C-2 PtP CPU 314C-2 DP Dimensions CPU 314C-2 PtP CPU 314C-2 DP Voltages and currents CPU 314C-2 PtP CPU 314C-2 DP CPU 312C Pin-out of the integrated DI/DO connector Technical data of the integrated I/OArrangement and usage of integrated I/Os Block diagram of the integrated digital I/O Standard Interrupt Count Posi-1 Input Tioning 1L+ 2L+ Controller See also Wiring of the current/voltage inputs Analog I/O Measurement principle Maximum frequency of the input signal is 400 HzIntegrated hardware low-pass filter Input filters software filter Principle of interference suppression with Step 50 Hz interference suppression Inputs not connected Outputs not connected Value range Default Range of efficiency ConfigurationParameters of standard DI Byte Byte 3 reservedByte 6 Byte 7 reserved Parameters of standard do Parameters of standard AIThere are no parameters for standard digital outputs See also .3 in the Module Data Reference Manual Parameters Value range Default Range of efficiency Parameters of standard AO \WH \WH \WH \WH \WH Parameter for technological functions\WH Interrupts Interrupt inputsStart information for OB40 Byte Variables Data type Description Diagnostics Digital inputsStandard I/O Technological functions Functions Manual Fast digital outputs Digital outputsTechnological functions use fast digital outputs 13 Technical data of digital outputs CPU 31xC and CPU 31x, Technical data Technical data Module-specific data Analog inputsVoltage, currents, potentials Analog value generation Status, interrupts, diagnostics Interference suppression, error limitsEncoder selection data Analog outputs Actuator selection data Technical data of CPU 31xC CPU 31xC and CPU 31x, Technical data Technical data of CPU Dimensions of CPU Technical data of CPU 31x 7.1 General technical data CPU Technical data Data areas and their retentivity Technical data Technical data Communication functions Mounting dimensions W x H x D mm 40 x 125 x Weight 270 g Technical data for the CPU Technical data Data areas and their retentivity Technical data Number of entries not configurable Max Mounting dimensions W x H x D mm 40 x 125 x Weight 280 g CPU 315-2 DP Technical data Data areas and their retentivity Technical data Diagnostic buffer Yes Number of entries not configurable Max 2nd interface Technical data DP slave CPU 315-2 PN/DP Technical data Technical data Assembly Parameters of SFBs/FBs and SFC/FC of the S7 CBA at 50 % communication load Transmission speed Up to 12 Mbps Number of DP slaves 124 Profinet IO Technical data Voltages and currents CPU 317-2 DP Technical data Timers/counters and their retentivity Technical data Technical data S7 signaling functions CPU 317-2 DP MPI DP slave Except for DP slave at both interfaces GSD file CPU 317-2 PN/DP Technical data Analog channels 4096/4096 Those local 256/256 Communication functions Routing Interface X1 configured as Yes MPI Profinet IO Technical data Voltages and currents Information about upgrading to a CPU 31xC or CPU Area of applicabilityWho should read this information? If you have used one of the following CPUs in the past Changed behavior of certain SFCs SFC 56, SFC 57 and SFC 13 which work asynchronouslyDPV1 Hereafter called SFC 20 Blkmov SFC 54 Rddparm SFCs that may return other results Activating / deactivating DP slaves via SFCPrevious response by the CPU with Stop status New response by the CPU Converting the diagnostic addresses of DP slaves Converting the diagnostic addresses of DP slavesRuntimes that change while the program is running Runtimes that change while the program is running Reusing existing hardware configurations Reusing existing hardware configurationsReplacing a CPU 31xC/31x Replacing a CPU 31xC/31x Consistent data 10 PG/OP functions Load memory concept for the CPU 31xC/31xRouting for the CPU 31xC/31x as an intelligent slave Changed retentive behavior for CPUs with firmware = Changed retentive behavior for CPUs with firmware = Procedure Asic Backup memory BusBus segment Clock flag bits CPU Default Router Data, temporaryDeterminism Device DPV1 Ertec Function block Functional groundGD circuit GD element GSD file HubIndustrial Ethernet Instance data block Interrupt, delay Interrupt, diagnosticInterrupt, update Interrupt, process LAN MPI NCM PC Nesting depth NetworkNon-isolated OB priority PLC PNO Profibus Profibus DP Profinet Profinet AsicProfinet CBA Profinet Component Profinet IO Proxy Real TimeReduction factor Reference ground SFB SFC Simatic Simatic NCM PCSimatic NET Snmp Step System diagnostics TimerTimers System function Token TopologyTwisted Pair Ungrounded WAN Glossary-23 Glossary-24 Index Index Index-3 Index