Operating and display elements CPU 31xC, X11 X12 | Siemens S7-300

Operating and display elements

2

2.1Operating and display elements: CPU 31xC

Operating and display elements of CPU 31xC

	1	2	3
	SF
	BF
MMC
	RUN
	STOP
	RUN
	STOP
	MRES
7
6	X1	X2
5		X11	X12
		X11	X12
4

The figures show	the following CPU elements
(1)	Status and error displays
(2)	Slot for the Micro Memory Card (MMC), incl. the ejector
(3)	Connections of the integrated I/O.
(4)	Power supply connection
(5)	2.	Interface X2	(PtP or DP)
(6)	1.	Interface X1	(MPI)
(7)	Mode selector switch

CPU 31xC and CPU 31x, Technical data	2-1
Manual, Edition 08/2004, A5E00105475-05

Image 17

Siemens S7-300 appendix Operating and display elements CPU 31xC, Operating and display elements of CPU 31xC, X11 X12

Contents

Preface ManualEdition 08/2004 Safety Guidelines Required basic knowledge Purpose of the ManualArea of application Iii CE label ApprovalsTick mark Standards This manual is part of the S7-300 documentation package Documentation classification Additional information required Recycling and Disposal Table of contents Table of contents Index-1 Tables Retentivity of the RAM Xii Table A-1 Information on Is available Selecting and configuringOverview Guide to the S7-300 documentation CPU performance Programming Manual From Profibus DP to Profinet X11 X12 Operating and display elements CPU 31xCOperating and display elements of CPU 31xC Integrated I/Os of CPU 31xC CPU 314C-2 PtP, for example Slot for the Simatic Micro Memory Card MMC Power supply connection Mode selector switchReference Differences between the CPUs LED designation Color Meaning Status and Error Indicators CPU 31xC Operating and display elements Operating and display elements CPUOperating and display elements CPU 312, 314, 315-2 DP Mode selector switch is used to set the CPU operating mode Operating and display elements CPU 317-2 DP Use the mode selector switch to set the CPU operating mode Operating and display elements CPU 31x-2 PN/DP Slot for the Simatic Micro Memory Card MMC Displays for the X1 and X2 interfaces Status and error displays of the CPUGeneral status and error displays CPU 31xC and CPU 31x, Technical data Multi-Point Interface MPI InterfacesAvailability Properties Operating modes for CPUs with two DP interfaces Devices capable of MPI communicationS7-300 / S7-400 with MPI interface S7-200 19.2 kbps only MPI/DP interface Profibus DP interface Requirements Connecting to Industrial EthernetDevices capable of Profibus DP communication Properties of Profinet interface Devices capable of Profinet PN communicationSee also Profinet IO System Transmission rate Point to Point PtPDrivers Devices capable of PtP communication Overview of communication services Communication servicesSelecting the communication service Overview of communication services Data exchanged by means of S7 basic communication PG communicationOP communication Configuration Use in server mode for5 S7 communication Use as client Send and receive conditions Global data communication MPI onlyReduction ratio GD resources of the CPUs RoutingCPU 315-2 DP 315-2 PN/DP Routing network nodes MPI DP Number of routed connections Routing network nodes MPI DP Ethernet2 DP 317-2 PN/DP Requirements Routing Example of a TeleService application Real installationConfiguration in Step PtP communication Data consistency What is PROFINET??Communication via Profinet only CPU 31x-2 PN/DP With PUT/GET functions Implementation of Profinet by us What is Profinet CBA Component based Automation?Objectives in Profinet ,2DWD9LHZ 352,17,2 Extent of Profinet CBA and Profinet IOFurther Information Graphic displays Profinet IO System Extended Functions of Profinet IOFollowing graphic shows the new functions of Profinet IO Profinet PN Blocks in Profinet IO Chapter ContentCompatibility of the New Blocks New Blocks Detailed Information Applicability System status lists SSLs in Profinet IO Chapter ContentCompatibility of the new SSLs Data block for the configuration of the connection How to use open IE communicationOpen communication via Industrial Ethernet Requirements Functionality Establishing a connection for communication DisconnectingData exchange Communication interruptions 1 S7 connection as communication path Snmp communication service AvailabilityS7 connections Assignment of S7 connections Reservation during configurationConnection points Transition point Assigning connections in the program Allocating connection resources to Ocms servicesTime sequence for allocation of S7 connection resources Example Distribution of connection resources Communication service DistributionDistribution and availability of S7 connection resources Total number Reserved for Free Connection S7 connections Availability of connection resourcesS7 basic Resources Number of connection resources for routing Connection resources for routingExample of a CPU 314C-2 DP Example for a CPU 317-2 PN/DP DPV1 Requirement for using the DPV1 functionality with DP slavesDefinition DPV1 Extended functions of DPV1 System blocks with DPV1 functionality Interrupt blocks with DPV1 functionalityProfibus DP Functionality Communication 3.4 DPV1 CPU memory areas Memory areas and retentivityThree memory areas of your CPU Load memory System memory Retentivity of the load memory, system memory and RAMRAM Retentive data in load memory Retentive data in RAM Retentivity of memory objectsRetentive behavior of memory objects Retentive behavior of a DB for CPUs with firmware RUN-STOP Retentive behavior of a DB for CPUs with firmware = Address areas of system memory Address areas of system memoryProcess image Address areas Description Time Process image update Configurable process image with CPU317 FW V2.3.0 or higher Retentivity of the load memory, system memory and RAM Local data Properties of an MMC Properties of the Micro Memory Card MMCMMC as memory module for the CPU Useful life of an MMC MMC copy protection General Memory functions Memory functionsLoading user program from Micro Memory Card MMC to the CPU Memory functions Uploading blocks Handling with modulesDownload of new blocks or delta downloads CPU memory reset CPU memory reset and restartDeleting blocks Compressing blocks Restart warm start Introduction RecipesProcessing sequence Recipe Recipe n Memory concept Memory functions Working memory Measured value log filesMeasured values Evaluation of measured values Function principle Backup of project data to a Micro Memory Card MMC Memory concept Memory functions Reference Execution time OverviewReference Cycle time Overview Cycle timeMeaning of the term cycle time Time slice model Step Sequence Sequence of cyclic program processingTime slices 1 ms each Extending the cycle time Calculating the cycle time Process image update + 60 μs per rack Extending the user program processing timeConst Portions CPU Factor Cycle control at the scan cycle check point CCP Process Diagnostic Time-of-dayWatchdog Interrupt Programming errors Access errors Extension of the cycle time due to errorDifferent cycle times Block processing times may fluctuate Maximum cycle time Communication loadExample 20 % communication load Example 50 % communication load Tips Physical cycle time depending on communication loadInfluence on the physical cycle time Cycle extension through component-based automation CBA Configuration during parameter assignmentRuntimes Extending the OB1 cycle time Profibus Tips and notes Additional marginal conditionsBase load through Profibus devices Response time Update times for Profinet IODefinition of response time Fluctuation width 17 ms DP cycle times in the Profibus DP network Conditions for the shortest response time Shortest response timeCalculation Shortest response time is the sum Delay of outputs + DP cycle time at Profibus DP Delay of inputs + DP cycle time at Profibus DPLongest response time Conditions for the longest response time Reducing the response time Reducing the response time with direct I/O accessLongest response time is the sum Shortest response time Longest response time Cycle extension through component-based automation CBA Calculating method for calculating the cycle/response timeCycle time Shortest response time Longest response time Response time Definition of interrupt response time Process/diagnostic interrupt response times of the CPUsInterrupt response time Tv 200 μs + 1000 μs x n% Signal modules Process interrupt processing Reproducibility of delay interrupts and watchdog interruptsDefinition of Reproducibility Reproducibility Example of cycle time calculation Sample calculations Calculating the longest response time Sample of response time calculation Calculation of the longest response time Example of interrupt response time calculation Cycle and reaction times 5.6 Sample calculations Dimensions of CPU 31xC General technical dataWidth of CPU Width Plug-in Simatic Micro Memory Cards Technical data of the Micro Memory Card MMCMaximum number of loadable blocks in the MMC Following memory modules are available CPU 312C Technical data Address areas I/O Technical dataData areas and their retentivity Testing and commissioning functions Technical data AssemblyS7 signaling functions Interfaces 1st interface Communication functions Dimensions Technical data FunctionalityProgramming Integrated functions CPU 313C Technical data of CPU 31xC 6.3 CPU 313C Technical data Timers/counters and their retentivity Technical data Address areas I/O Technical data MPI KHz see the Manual Technological Functions Technical data Integrated I/O CPU 313C-2 PtP and CPU 313C-2 DP Technical data CPU 313C-2 PtP CPU 313C-2 DP CPU and versionMemory CPU 313C-2 PtP CPU 313C-2 DP Execution times CPU 313C-2 PtP CPU 313C-2 DP Address areas I/O CPU 313C-2 PtP CPU 313C-2 DP Assembly CPU 313C-2 PtP CPU 313C-2 DPBlocks CPU 313C-2 PtP CPU 313C-2 DP Time-of-day CPU 313C-2 PtP CPU 313C-2 DP Technical data CPU 313C-2 PtP CPU 313C-2 DPS7 signaling functions CPU 313C-2 PtP CPU 313C-2 DP Interfaces CPU 313C-2 PtP CPU 313C-2 DP 1st interface DP master GSD file Technical data CPU 313C-2 PtP CPU 313C-2 DP DP slavePoint-to-point communication Programming CPU 313C-2 PtP CPU 313C-2 DP Voltages and currents CPU 313C-2 PtP CPU 313C-2 DP Dimensions CPU 313C-2 PtP CPU 313C-2 DP CPU 314C-2 PtP and CPU 314C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DP CPU and versionMemory CPU 314C-2 PtP CPU 314C-2 DP Execution times CPU 314C-2 PtP CPU 314C-2 DP Address areas I/O CPU 314C-2 PtP CPU 314C-2 DP Assembly CPU 314C-2 PtP CPU 314C-2 DPBlocks CPU 314C-2 PtP CPU 314C-2 DP Time-of-day CPU 314C-2 PtP CPU 314C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DPS7 signaling functions CPU 314C-2 PtP CPU 314C-2 DP Interfaces CPU 314C-2 PtP CPU 314C-2 DP 1st interface 2nd interface CPU 314C-2 PtP CPU 314C-2 DP Integrated I/O CPU 314C-2 PtP CPU 314C-2 DP Technical data CPU 314C-2 PtP CPU 314C-2 DP DP slaveProgramming CPU 314C-2 PtP CPU 314C-2 DP Voltages and currents CPU 314C-2 PtP CPU 314C-2 DP Dimensions CPU 314C-2 PtP CPU 314C-2 DP Arrangement and usage of integrated I/Os Technical data of the integrated I/OCPU 312C Pin-out of the integrated DI/DO connector Block diagram of the integrated digital I/O Standard Interrupt Count Posi-1 Input Tioning 1L+ 2L+ Controller See also Analog I/O Wiring of the current/voltage inputs Integrated hardware low-pass filter Maximum frequency of the input signal is 400 HzMeasurement principle Principle of interference suppression with Step Input filters software filter 50 Hz interference suppression Outputs not connected Inputs not connected Parameters of standard DI ConfigurationValue range Default Range of efficiency Byte 3 reserved ByteByte 6 Byte 7 reserved Parameters of standard AI Parameters of standard doThere are no parameters for standard digital outputs See also .3 in the Module Data Reference Manual Parameters of standard AO Parameters Value range Default Range of efficiency \WH \WH \WH \WH \WH Parameter for technological functions\WH Interrupt inputs InterruptsStart information for OB40 Byte Variables Data type Description Digital inputs DiagnosticsStandard I/O Technological functions Functions Manual Technological functions use fast digital outputs Digital outputsFast digital outputs 13 Technical data of digital outputs CPU 31xC and CPU 31x, Technical data Analog inputs Technical data Module-specific dataVoltage, currents, potentials Analog value generation Encoder selection data Interference suppression, error limitsStatus, interrupts, diagnostics Analog outputs Actuator selection data Technical data of CPU 31xC CPU 31xC and CPU 31x, Technical data Dimensions of CPU Technical data of CPU Technical data of CPU 31x 7.1 General technical data CPU Technical data Data areas and their retentivity Technical data Technical data Communication functions Mounting dimensions W x H x D mm 40 x 125 x Weight 270 g Technical data for the CPU Technical data Data areas and their retentivity Technical data Number of entries not configurable Max Mounting dimensions W x H x D mm 40 x 125 x Weight 280 g CPU 315-2 DP Technical data Data areas and their retentivity Technical data Diagnostic buffer Yes Number of entries not configurable Max 2nd interface Technical data DP slave CPU 315-2 PN/DP Technical data Technical data Assembly Parameters of SFBs/FBs and SFC/FC of the S7 CBA at 50 % communication load Transmission speed Up to 12 Mbps Number of DP slaves 124 Profinet IO CPU 317-2 DP Technical data Voltages and currents Technical data Timers/counters and their retentivity Technical data CPU 317-2 DP Technical data S7 signaling functions MPI DP slave Except for DP slave at both interfaces GSD file CPU 317-2 PN/DP Technical data Analog channels 4096/4096 Those local 256/256 Communication functions Routing Interface X1 configured as Yes MPI Profinet IO Technical data Voltages and currents Area of applicability Information about upgrading to a CPU 31xC or CPUWho should read this information? If you have used one of the following CPUs in the past SFC 56, SFC 57 and SFC 13 which work asynchronously Changed behavior of certain SFCsDPV1 Hereafter called SFC 54 Rddparm SFC 20 Blkmov Activating / deactivating DP slaves via SFC SFCs that may return other resultsPrevious response by the CPU with Stop status New response by the CPU Converting the diagnostic addresses of DP slaves Converting the diagnostic addresses of DP slavesRuntimes that change while the program is running Runtimes that change while the program is running Reusing existing hardware configurations Reusing existing hardware configurationsReplacing a CPU 31xC/31x Replacing a CPU 31xC/31x Consistent data Routing for the CPU 31xC/31x as an intelligent slave Load memory concept for the CPU 31xC/31x10 PG/OP functions Changed retentive behavior for CPUs with firmware = Changed retentive behavior for CPUs with firmware = Procedure Asic Bus Backup memoryBus segment Clock flag bits CPU Data, temporary Default RouterDeterminism Device DPV1 Ertec Functional ground Function blockGD circuit GD element Hub GSD fileIndustrial Ethernet Instance data block Interrupt, diagnostic Interrupt, delayInterrupt, update Interrupt, process LAN NCM PC MPI Network Nesting depthNon-isolated OB priority PNO PLC Profibus DP Profibus Profinet Asic ProfinetProfinet CBA Profinet Component Profinet IO Real Time ProxyReduction factor Reference ground SFC SFB Simatic NCM PC SimaticSimatic NET Snmp Step Timer System diagnosticsTimers System function Topology TokenTwisted Pair Ungrounded Glossary-23 WAN Glossary-24 Index Index Index-3 Index