Xantrex Technology XMP 2600 manual Remote communication time out, Primary engine status structure

Models: XMP 2600

1 93
Download 93 pages 36.85 Kb
Page 27
Image 27

Handling SRQ and the IEEE488.2 Status Structures

Usage Guidelines

Remote communication time out

The Remote Communications Time Out bit is the only element of this part of the Status Structure.

The bit is set to 1 when the Time Out mechanism is enabled and a Time Out event occurs.

Primary engine status structure

The Status Structure associated with the Primary Engine of the XMP 2600 is made out of the Primary Status Register, a fixed positive Mask Register, the Primary Event Status Register and the Primary Event Status Enable Register.

The summary bit of this Status Structure (the PRIM ERR bit) will be set when Primary events are registered in the Primary Event Status Register and the corresponding bits of the Primary Event Status Enable Register are set. Note that the Primary Event Status Register records only occurrences of conditions and does not register anything when a condition is removed (this is the work of the positive Mask Register).

If the PRIM ERR bit was read as 1, the Primary Event Status Register should be read (using the PER? Query). This will reveal what Primary event has occurred since the register was last read.

The actual status of the Primary Engine can be obtained using the PSR? Query.

Summary of power modules status

Each of the Power Modules in the XMP 2600 system has its own Status Structure. The summary bits of those Status Structures are grouped in a 16-bit register (read as two 8 bit registers) called the Power Modules Summary Register.

This register (read with the SRQS? Query) is summarized in the Status Byte as the SRQ IS bit.

The SRQ IS bit will be set whenever one of the bits of the Power Modules Summary Register is changed to 1.

The content of the Power Modules Summary Register is cleared when the controlling computer reads the register.

Bits of the Power Modules Summary Register are set when Power Modules events seep through the filters of the Power Modules Status Structures.

When the SRQ IS bit of the Status register was read as 1, the Power Modules Summary Register should be read. For each set bit in the Power Modules Summary Register the corresponding Power Modules Status Structure should be explored.

Power modules status structure

The Status Structure of the Power Modules is made out of the following elements:

Status Registers – Warnings, Output state, Faults, Error Code and general Status.

Mask Registers – some are fixed and some are programmable.

Event Register.

Event Enable Register.

The summary bit of the entire structure is read at the Power Modules position in the Power Modules Summary Register (e.g. the summary bit of module number 3 will be evident at bit 2 of the summary register [bits are counted starting with 0]).

The Power Module Status Structure is read as a whole using the CSTS? Query.

14

XMP 2600 Programming Manual rev. 1.1

Page 27
Image 27
Xantrex Technology XMP 2600 Remote communication time out, Primary engine status structure, Power modules status structure