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Introduction
1-8
Copyright ©2001-2003. All rights reserved.
ARM DUI 0163B
Contents
Main
Integrator/IM-AD1
User Guide Copyright 2001-2003. All rights reserved.
Note
Page
Contents Integrator/IM-AD1 User Guide
Chapter 4 Reference Design Example
Appendix A Signal Descriptions
Glossary
Appendix B Mechanical Specification
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About this book
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Page
Feedback
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1.1 About the Integrator/IM-AD1
Figure1-1 Integrator/IM-AD1 layout
CAN (J3A and J3B)
1.2 Interface module features and architecture
Figure 1-2 Integrator/IM-AD1 block diagram
1.3 Links and LEDs
1.4 Care of modules
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2.1 Fitting the interface module
2.2 Setting up the logic module
2.3 Running the test software
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3.1 Differences in signal routing between supported logic modules
3.2 UART interface
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3.3 SPI
3.4 PWM interface
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3.5 Stepper motor interface
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3.5.3 Stepper motor connectors Figure 3-6 shows the pin numbering of the stepper motor connectors.
Table3-7 shows the signal assignment.
3.6 GPIO
J16
Figure 3-7 GPIO connectors J16 and J17
J17
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3.7 CAN interface
J3B
EXPIM Socket
Figure 3-8 CAN interface architecture
U13
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Table3-9 shows the signal assignment.
3.8 ADC and DAC interfaces
J2
J1
EXPIM socket
Figure 3-10 ADC and DAC interface architecture
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J1
Figure 3-12 shows the pinout of the DAC interface connector (J2).
J2
Figure 3-12 DAC connector pinout
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Chapter 4 Reference Design Example
4.1 About the design example
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4.2 Example APB register peripheral
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You must also observe the operating range limits:
Note The default values for these registers set CLK1 to 25MHz and CLK2 to 12MHz.
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4.4 SPI chip select register
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4.6 PWM controller
4.7 Stepper motor peripheral
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4.8 GPIO
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4.10 Vectored interrupt controller
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4.11 CAN controller interface
4.12 ADC and DAC interface
4.13 Peripheral information block
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The signals present on the EXPA connector are described in TableA-1.
Signal Descriptions
A-4 Copyright 2001-2003. All rights reserved. ARM DUI 0163B
A.2 EXPB
FigureA -2 shows the pin numbers of the socket EXPB on the underside of the interface module.
Figure A-2 EXPB socket pin numbering
TableA-2 describes the signals on the pins labeled F[31:0], H[31:0], and J[16:0].
Signal Descriptions
A-6 Copyright 2001-2003. All rights reserved. ARM DUI 0163B
A.3 EXPIM
FigureA-3 EXPIM connectors pin numbering
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A.4 Logic analyzer connector
TableA-4 shows the pinout of the logic analyzer connector.
A.5 Multi-ICE (JTAG)
FigureA-5 Multi-ICE connector pinout
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B.1 Mechanical information
FigureB-1 Board dimensions (top view)
Figure B-2 Bottom board dimensions (viewed from top side)
B.2 Connector reference
Glossary
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Index
A
B
C
D
G
I
L
M
N
