ARM DUI 0163B Copyright ©2001-2003. All rights reserved. Index-1
Index

The items in this index are listed in alphabetical order, with symbols and numerics appearing at the end. The

references given are to page numbers.

A

ADC and DAC interface architecture
3-18
ADC and DAC interface registers 4-27
ADC connector 3-20
ADC, sampling rate 1-4
APB register peripheral 4-8
Architecture
ADC and DAC interface 3-18
CAN controller interface 3-14
stepper interface 3-8
Architecture of the supplied example
4-2
ARM PrimeCell peripherals 4-2

B

Block diagram, system 1-5

C

CAN 4-26
CAN connector 3-16
CAN interface 3-14, 4-26
CAN interface signals 3-15
CAN reset register 4-26
Care of modules 1-7
CLK2 signal 4-15
CONFIG link 1-6
Connector identification 1-2
Connectors
ADC 3-20
CAN 3-16
DAC 3-21
dimensions B-2
GPIO 3-12
Multi-ICE A-10
PWM 3-6
signals A-1
SPI 3-5
stepper 3-10

D

DAC connector 3-21
Data direction, GPIO 4-21
Data ouptut set, GPIO 4-21
Data register output clear, GPIO 4-21
Descriptions, VHDL files 4-3

E

Electromagnetic conformity iii
Example memory map 4-4
EXPA pinout A-2
EXPB pinout A-5
EXPIM pinout A-6
EXPIM signal descriptions A-7

F

FCC notice iii