Oscillator lock register, Lmlock register | Arm Enterprises IM-AD1

Reference Design Example

4.2.2Oscillator lock register

The lock register is used to control access to the oscillator registers, allowing them to be locked and unlocked. This mechanism prevents the oscillator registers from being overwritten accidently. Table 4-6 describes the lock register bits.

				Table 4-6 LM_LOCK register

Bits	Name	Access	Function

16	LOCKED	Read	This bit indicates if the oscillator registers are
			locked or unlocked:
			0	= unlocked
			1	= locked.

15:0	LOCKVAL	Read/write	Write the value 0x0000A05F to this register to
			enable write accesses to the oscillator
			registers.

Write any other value to this register to lock the oscillator registers.

4.2.3User LEDs control register

The LEDs register is a 9-bit register used to control the nine user LEDs on the logic module. Writing a 0 to a bit lights the associated LED.

4.2.4Push button interrupt register

The push button interrupt register contains 1 bit. It is a latched indication that the push button on the logic module has been pressed. The output from this register is used to drive an input to the interrupt controller. Table 4-7 describes the operation of this register.

			Table 4-7 LM_INT register

Bits	Name	Access	Function

0	LM_INT	Read	This bit when SET is a latched indication that
			the push button has been pressed.

		Write	Write 0 to this register to CLEAR the latched
			indication.
			Writing 1 to this register has the same effect as
			pressing the push button.

ARM DUI 0163B

Copyright © 2001-2003. All rights reserved.

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Arm Enterprises IM-AD1 manual Oscillator lock register, User LEDs control register, Push button interrupt register

Contents

Integrator/IM-AD1 User Guide Integrator/IM-AD1 Conformance Notices Copyright 2001-2003. All rights reserved Chapter Introduction Integrator/IM-AD1 User Guide Appendix a Signal Descriptions Preface Using this book About this bookIntended audience Typographical conventions Further readingARM publications Third-party documents Feedback Feedback on this documentFeedback on the Integrator/IM-AD1 Xii Introduction ARM DUI 0163B About the Integrator/IM-AD1 Integrator/IM-AD1 layout Features Interface module features and architecture Architecture Integrator/IM-AD1 block diagram Links and LEDs Config LED Care of modules Introduction Copyright 2001-2003. All rights reserved Getting Started Assembled Integrator development system Fitting the interface module Switch 2 Closed Switch 3 Open Switch 4 Open Setting up the logic module Running the test software Hardware Reference Hardware Reference Connector Serial interface signal assignment Signal nameUart interface Description Serial connector signal assignment Pin J18 Type Description Serial connector pinout SPI SPI signals Signal PWM interface PWM interface signals Signal PWM connector signals Pin J14 J10 Description Shows the signal assignment Functional description Stepper motor interface Therefore, with a 0.1Ω sense resistor fitted Stepper motor interface signal summary Stepper motor interface signals Stepper motor connectors VSS Stepper motor connector signals Pin J19 J23 Description Gpio Gpio connectors J16 and J17 Hardware Reference Can interface U13Buffer Can interface signal assignment Signal IMBBANK28 IMBBANK29IMBBANK30 GND Can connector signal assignments Pin 10 ADC and DAC interface architecture ADC and DAC interfaces IMABANK49 IMABANK48IMABANK50 IMABANK51 11shows the pinout of the ADC interface connector J1 12 shows the pinout of the DAC interface connector J2 Hardware Reference Copyright 2001-2003. All rights reserved Reference Design Example About the design example About PrimeCellsExample architecture File Description Vhdl file descriptions Example memory map Integrator system memory map Address assignment of logic modules Integrator/IM-AD1 memory map Logic module addresses Position Bits StackIntegrator/IM-AD1 memory map Device Address Gpioa StepperbGpiob Ssram Example APB register peripheral Logic module registersOffset address Name Type Function Oscillator divisor registers LMOSCx registers Bits Name Access Function RDWVDW Oscillator lock register Bits Name Access FunctionUser LEDs control register Push button interrupt register Switches register Uart SPICS2 SPI chip select registerSPICS1 SPICS0 Synchronous serial port PWM controller Stepper motor peripheral Offset Name Access Function AddressCont Count Stepper x control register Docount SinglestepDIR Stepx speed register Stepx count register Address offset Name Access Size Function Read data output pinsData output set register Read data input register Gpio direction control 1 bit Data direction Ssram interface Interrupt sources Vectored interrupt controllerInterrupt Interrupt source Source number CAN1 Reference Design Example Canreset Can reset control registerCan controller interface CANxBase 16 ADC and DAC interface registers ADC and DAC interfaceAdcstatus ADC2BUSY Peripheral information block 18 PIB entry formatBits Name Function Signal Descriptions Expa Pin label Signal Description Table A-1 AHB signal assignment Expb Pin label Name Description Table A-2 Expb signal description Expim Table A-3 Expim signal descriptions LabelLM-EP20K1000E Description Figure A-4 J7 pin locations Logic analyzer connector CLK1 Table A-4 J7 connector pinout Signal Pin Multi-ICE Jtag Figure A-5 Multi-ICE connector pinout Mechanical Specification Mechanical information Figure B-1 Board dimensions top view Figure B-2 Bottom board dimensions viewed from top side Connector reference DB9DUALDB9STRAIGHT FCI Multi-ICE Glossary Synchronous Serial Port ADC Can IndexDAC Gpio Expa A-2 Gpiodataclr Gpiodatain Gpiodataout Gpiodataset GpiodirnLmleds Lmlock LMOSC1