Stepper motor interface | Arm Enterprises IM-AD1 specification

Hardware Reference

3.5Stepper motor interface

The IM-AD1 provides four stepper motor interfaces. Two of these, Step 1 and Step 2, are provided with on-board motor drivers for bipolar motors. The remaining two, Step

3and Step 4, provide logic-level signals that are connected to two 10-pin headers. This enables you to connect to off-board motor drivers.

3.5.1Functional description

The on-board stepper motor drivers comprise a L6506 current controller and L298 bridge drivers. These are controlled directly by outputs from the logic module and are configured to drive bipolar motors. Figure 3-5shows the architecture of one stepper motor driver.

STEP1_VSS

	STEP1_ENA
Socket	STEP1_ENB
Socket	STEP1_PH2
	STEP1_PH1		L298
			L298
IM	STEP1_PH3	L6506	(U24)
IM	STEP1_PH3	(U23)
	STEP1_PH4	(U23)
	STEP1_PH4

STEP1_O1

STEP1_O2

STEP1_O3

STEP1_O4

J19

	motor	windings
	Stepper	windings
	Stepper

STEP_GND

Figure 3-5 Stepper motor drivers (Step 1)

The L298 contains driver circuitry for two bridges, and each bridge has separate enable signals. The enable signals and four phase drive signals are supplied by a stepper motor controller instantiated in the logic module FPGA (see Chapter 4 Reference Design Example). The controller logic uses the 4MHz IM_CLK signal divided to provide a step clock.

The L6506 uses a chopper circuit, operating at a frequency of 21kHz, to control the current on the phase drive signals to the stepper motor. A 0.1Ω sense resistor is provided to generate a voltage drop that is proportional to the motor current. The sense voltage is compared against a reference voltage of 0.15V that is supplied to the L6506 by a resistive divider. When the reference voltage is reached, the phase drive signals are turned off until the start of the next chopper period.

3-8

Copyright © 2001-2003. All rights reserved.

ARM DUI 0163B

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Arm Enterprises IM-AD1 manual Stepper motor interface, Functional description

Contents

Integrator/IM-AD1 Integrator/IM-AD1 User Guide Conformance Notices Copyright 2001-2003. All rights reserved Integrator/IM-AD1 User Guide Chapter Introduction Appendix a Signal Descriptions Preface Intended audience Using this bookAbout this book ARM publications Typographical conventionsFurther reading Third-party documents Feedback on the Integrator/IM-AD1 FeedbackFeedback on this document Xii Introduction About the Integrator/IM-AD1 ARM DUI 0163B Integrator/IM-AD1 layout Interface module features and architecture Features Integrator/IM-AD1 block diagram Architecture Config LED Links and LEDs Care of modules Introduction Copyright 2001-2003. All rights reserved Getting Started Fitting the interface module Assembled Integrator development system Setting up the logic module Switch 2 Closed Switch 3 Open Switch 4 Open Running the test software Hardware Reference Hardware Reference Serial interface signal assignment Signal name ConnectorUart interface Description Serial connector pinout Serial connector signal assignment Pin J18 Type Description SPI signals Signal SPI PWM interface signals Signal PWM interface Shows the signal assignment PWM connector signals Pin J14 J10 Description Stepper motor interface Functional description Stepper motor interface signal summary Therefore, with a 0.1Ω sense resistor fitted Stepper motor connectors Stepper motor interface signals Stepper motor connector signals Pin J19 J23 Description VSS Gpio connectors J16 and J17 Gpio Hardware Reference Buffer Can interfaceU13 Can interface signal assignment Signal IMBBANK30 IMBBANK28IMBBANK29 Can connector signal assignments Pin GND ADC and DAC interfaces 10 ADC and DAC interface architecture IMABANK48 IMABANK49IMABANK50 IMABANK51 11shows the pinout of the ADC interface connector J1 12 shows the pinout of the DAC interface connector J2 Hardware Reference Copyright 2001-2003. All rights reserved Reference Design Example Example architecture About the design exampleAbout PrimeCells Vhdl file descriptions File Description Example memory map Address assignment of logic modules Integrator system memory map Integrator/IM-AD1 memory map Device Address Integrator/IM-AD1 memory mapLogic module addresses Position Bits Stack Stepperb GpioaGpiob Ssram Offset address Name Type Function Example APB register peripheralLogic module registers Oscillator divisor registers VDW LMOSCx registers Bits Name Access FunctionRDW Bits Name Access Function Oscillator lock registerUser LEDs control register Push button interrupt register Switches register Uart SPI chip select register SPICS2SPICS1 SPICS0 Synchronous serial port PWM controller Offset Name Access Function Address Stepper motor peripheralCont Count Stepper x control register DIR DocountSinglestep Stepx count register Stepx speed register Read data output pins Address offset Name Access Size FunctionData output set register Read data input register Data direction Gpio direction control 1 bit Ssram interface Vectored interrupt controller Interrupt sourcesInterrupt Interrupt source Source number CAN1 Reference Design Example Can reset control register CanresetCan controller interface CANxBase ADC and DAC interface 16 ADC and DAC interface registersAdcstatus ADC2BUSY Bits Name Function Peripheral information block18 PIB entry format Signal Descriptions Expa Table A-1 AHB signal assignment Pin label Signal Description Expb Table A-2 Expb signal description Pin label Name Description Expim LM-EP20K1000E Description Table A-3 Expim signal descriptionsLabel Logic analyzer connector Figure A-4 J7 pin locations Table A-4 J7 connector pinout Signal Pin CLK1 Figure A-5 Multi-ICE connector pinout Multi-ICE Jtag Mechanical Specification Figure B-1 Board dimensions top view Mechanical information Figure B-2 Bottom board dimensions viewed from top side DB9STRAIGHT FCI Connector referenceDB9DUAL Glossary Multi-ICE Synchronous Serial Port Index ADC CanDAC Gpio Lmleds Lmlock LMOSC1 Expa A-2Gpiodataclr Gpiodatain Gpiodataout Gpiodataset Gpiodirn