Arm Enterprises IM-AD1

Signal Descriptions

TableA-3 shows the signals for the interface module for Integrator/LM-XCV2000E or

LM-EP20K1000E logic module types.

Caution

For correct operation of the interface module, VCCO_A and VCCO_B must be set to

3.3V. Ensure that the VCCO links are set correctly on the logic module.

TableA-3 EXPIM signal descriptions

Label LM-XCV2000E LM-EP20K1000E Description

IM_ABANK[59:0] IM_0BANK[59:0] IM_5BANK[59:0] FPGA input/output pins.

IM_BBANK[53:0] IM_1BANK[53:0] IM_6BANK[53:0] FPGA input/output pins.

EXP[92:85] Not used Not used -

EXP93 IM_CLK IM_CLK Clock signal from IM-AD1 to the logic module

FPGA.

EXP[96:94] Not used Not used -

EXP97 VCCO_0 VCCO_5 Configurable voltage power supply rail.

Not used (socket).

EXP98 VCCO_0 VCCO_5 Configurable voltage power supply rail.

Not used (socket).

EXP185 Not used Not used -

EXP[189:187] Not used Not used -

EXP191 CLK1_1 CLK1_1 Clock signal from the CLK1 buffer on the logic

module

EXP194 GND GND Ground

EXP[196:192] Not used Not used -

EXP197 VCCO_1 VCCO_6 Configurable voltage power supply rail.

Not used (socket).

EXP198 VCCO_1 VCCO_6 Configurable voltage power supply rail

Not used (socket).