CHAPTER 4: INSTRUCTION SET

 

 

 

JP %Y

Indirect jump using Y reg.

1 cycle

Function: PC ←

Y

 

Loads the content of the Y register into the PC to branch unconditionally.

Code:

Mnemonic

 

 

MSB

 

 

 

 

 

 

 

LSB

 

JP %Y

 

 

 

1

 

1

1

1

1

1

1

1

1

0

0

1

X

1FF2H, (1FF3H)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Flags:

E

 

I

 

C

 

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Mode:

Register direct

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Extended addressing: Invalid

 

 

 

 

 

 

 

 

 

 

JR %A

 

 

 

 

Jump to relative location A reg.

 

 

 

 

 

1 cycle

Function: PC ←

PC + A + 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Adds the content of the A register to the address next to this instruction, to unconditionally

 

branch to that address. Branch destination range is the next address of this instruction +0 to 15.

Code:

Mnemonic

MSB

 

 

LSB

 

JR %A

 

1

 

1

1

1

1

1

1

1

1

0

0

0

1

1FF1H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Flags:

E

 

I

 

C

 

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Mode:

Register direct

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Extended addressing: Invalid

 

 

 

 

 

 

S1C63000 CORE CPU MANUAL

EPSON

95