Epson S1C63000 RR [%ir]+, SBC %r,%r, 1 cycle, 2 cycles, Subtract with carry r' reg. from r reg, Rotate right location [ir reg.] with carry and increment ir reg

CHAPTER 4: INSTRUCTION SET

RR [%ir]+						Rotate right location [ir reg.] with carry and increment ir reg.	2 cycles
Function:						[ir] , ir ← ir +1
					C
	3	2	1	0

Rotates the content of the data memory addressed by the ir register (X or Y) including the carry

(C)to the right for 1 bit. The content of the C flag moves to bit 3 of the data memory and bit 0 moves to the C flag. Then increments the ir register (X or Y). The increment result of the ir register does not affect the flags.

Code:	Mnemonic			MSB														LSB
	RR [%X]+				1		0	0	0	0	1	1	1	0	1	1	0		1	10EDH
	RR [%Y]+				1		0	0	0	0	1	1	1	0	1	1	1		1	10EFH
Flags:	E	I	C			Z
	↓	–	↕				↕
Mode:	Register indirect
	Extended addressing: Invalid

SBC %r,%r'	Subtract with carry r' reg. from r reg.	1 cycle
Function: r ← r - r' - C

Subtracts the content of the r' register (A or B) and carry (C) from the r register (A or B).

Code:	Mnemonic			MSB														LSB
	SBC %A,%A				1		1	0	0	0	1	1	1	1	0	0	0		X	18F0H, (18F1H)
	SBC %A,%B				1		1	0	0	0	1	1	1	1	0	0	1		X	18F2H, (18F3H)
	SBC %B,%A				1		1	0	0	0	1	1	1	1	0	1	0		X	18F4H, (18F5H)
	SBC %B,%B				1		1	0	0	0	1	1	1	1	0	1	1		X	18F6H, (18F7H)
Flags:	E	I	C			Z
	↓	–	↕				↕
Mode:	Src: Register direct
	Dst: Register direct
	Extended addressing: Invalid

S1C63000 CORE CPU MANUAL EPSON 123