CHAPTER 4: INSTRUCTION SET

 

 

 

CMP %r,[%ir]

Compare r reg. with location [ir reg.]

1 cycle

Function: r - [ir]

Subtracts the content of the data memory addressed by the ir register (X or Y) from the content of the r register (A or B). It changes the flags (Z and C), but does not change the content of the register.

Code:

Mnemonic

 

MSB

 

 

 

 

 

 

 

 

 

 

LSB

 

 

CMP %A,[%X]

 

 

1

 

1

1

1

0

0

1

1

0

0

0

0

 

0

1E60H

 

CMP %A,[%Y]

 

 

1

 

1

1

1

0

0

1

1

0

0

0

1

 

0

1E62H

 

CMP %B,[%X]

 

 

1

 

1

1

1

0

0

1

1

0

0

1

0

 

0

1E64H

 

CMP %B,[%Y]

 

 

1

 

1

1

1

0

0

1

1

0

0

1

1

 

0

1E66H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Flags:

E

I

 

C

 

 

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

↓

–

 

↕

 

 

 

↕

 

 

 

 

 

 

 

 

 

 

 

 

 

Mode:

Src: Register indirect

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Dst: Register direct

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Extended addressing: Valid

 

 

 

 

 

 

 

 

 

 

 

 

 

Extended

LDB

%EXT,imm8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

operation: CMP

%r,[%X]

 

 

r - [00imm8] (00imm8 = 0000H + 00H to FFH)

 

LDB

%EXT,imm8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CMP

%r,[%Y]

 

 

r - [FFimm8] (FFimm8 = FF00H + 00H to FFH)

CMP %r,[%ir]+

 

Compare r reg. with location [ir reg.] and increment ir reg.

1 cycle

Function: r - [ir], ir ←

 

ir + 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Subtracts the content of the data memory addressed by the ir register (X or Y) from the content

 

of the r register (A or B). It changes the flags (Z and C), but does not change the content of the

 

register. Then increments the ir register (X or Y). The increment result of the ir register does not

 

affect the flags.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Code:

Mnemonic

 

 

 

MSB

 

 

 

 

 

 

 

 

 

 

LSB

 

 

 

CMP %A,[%X]+

 

1

 

1

1

1

0

0

1

1

0

0

0

0

 

1

1E61H

 

 

CMP %A,[%Y]+

 

1

 

1

1

1

0

0

1

1

0

0

0

1

 

1

1E63H

 

 

CMP %B,[%X]+

 

1

 

1

1

1

0

0

1

1

0

0

1

0

 

1

1E65H

 

 

CMP %B,[%Y]+

 

1

 

1

1

1

0

0

1

1

0

0

1

1

 

1

1E67H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Flags:

E

 

I

 

C

 

 

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

↓

 

–

 

↕

 

 

 

↕

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Mode:

Src: Register indirect

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Dst: Register direct

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Extended addressing: Invalid

 

 

 

 

 

 

 

 

 

 

 

 

 

S1C63000 CORE CPU MANUAL

EPSON

85