Epson S1C63000 OR %r,[%ir]+, OR [%ir],%r, 1 cycle, 2 cycles, Logical OR of r reg. and location [ir reg.], Logical OR of location [ir reg.] and r reg. and increment ir reg

CHAPTER 4: INSTRUCTION SET

OR %r,[%ir]+				Logical OR of location [ir reg.] and r reg. and increment ir reg.																	1 cycle
Function: r ←		r ∨ [ir], ir ←		ir +1
	Performs a logical OR operation of the content of the data memory addressed by the ir register
	(X or Y) and the content of the r register (A or B), and stores the result in the r register. Then
	increments the ir register (X or Y). The flags change due to the operation result of the r register
	and the increment result of the ir register does not affect the flags.
Code:	Mnemonic			MSB														LSB
	OR %A,[%X]+				1		1	0	1	1	0	1	1	0	0	0	0		1	1B61H
	OR %A,[%Y]+				1		1	0	1	1	0	1	1	0	0	0	1		1	1B63H
	OR %B,[%X]+				1		1	0	1	1	0	1	1	0	0	1	0		1	1B65H
	OR %B,[%Y]+				1		1	0	1	1	0	1	1	0	0	1	1		1	1B67H
Flags:	E		I	C		Z
	↓		–	–		↕
Mode:	Src: Register indirect
	Dst: Register direct
	Extended addressing: Invalid

OR [%ir],%r				Logical OR of r reg. and location [ir reg.]																	2 cycles
Function: [ir] ←		[ir] ∨ r
	Performs a logical OR operation of the content of the r register (A or B) and the content of the
	data memory addressed by the ir register (X or Y), and stores the result in that address.
Code:	Mnemonic			MSB															LSB
	OR [%X],%A				1		1	0	1	1	0	1	1		0	1	0	0		0	1B68H
	OR [%X],%B				1		1	0	1	1	0	1	1		0	1	1	0		0	1B6CH
	OR [%Y],%A				1		1	0	1	1	0	1	1		0	1	0	1		0	1B6AH
	OR [%Y],%B				1		1	0	1	1	0	1	1		0	1	1	1		0	1B6EH
Flags:	E		I	C		Z
	↓		–	–		↕
Mode:	Src: Register direct
	Dst: Register indirect
	Extended addressing: Valid
Extended	LDB		%EXT,imm8
operation: OR			[%X],%r		[00imm8] ←					[00imm8] ∨			r (00imm8 = 0000H + 00H to FFH)
	LDB		%EXT,imm8
	OR		[%Y],%r		[FFimm8] ←					[FFimm8] ∨				r (FFimm8 = FF00H + 00H to FFH)

114 EPSON S1C63000 CORE CPU MANUAL