Epson S1C63000 OR %r,%r’, OR %r,imm4, Code:, Mode:, Code:, Mode:, Flags:, Flags:, 1 cycle, 1 cycle, Function: r ←, Function: r ← r ∨, Logical OR of r’ reg. and r reg

CHAPTER 4: INSTRUCTION SET

OR %r,%r’	Logical OR of r’ reg. and r reg.	1 cycle
Function: r ← r ∨	r’

Performs a logical OR operation of the content of the r’ register (A or B) and the content of the r register (A or B), and stores the result in the r register.

Code:	Mnemonic			MSB														LSB
	OR %A,%A				1		1	0	1	1	0	1	1	1	0	0	0		X	1B70H, (1B71H)
	OR %A,%B				1		1	0	1	1	0	1	1	1	0	0	1		X	1B72H, (1B73H)
	OR %B,%A				1		1	0	1	1	0	1	1	1	0	1	0		X	1B74H, (1B75H)
	OR %B,%B				1		1	0	1	1	0	1	1	1	0	1	1		X	1B76H, (1B77H)
Flags:	E	I	C			Z
	↓	–	–			↕
Mode:	Src: Register direct
	Dst: Register direct
	Extended addressing: Invalid

OR %r,imm4

Logical OR of immediate data imm4 and r reg.

1 cycle

Function: r ←

r ∨ imm4

Performs a logical OR operation of the 4-bit immediate data imm4 and the content of the r

register (A or B), and stores the result in the r register.

Code:

Mnemonic

MSB

LSB

OR %A,imm4

1

1

0

1

1

0

1

0

0

i3

i2

i1

i0

1B40H–1B4FH

OR %B,imm4

1

1

0

1

1

0

1

0

1

i3

i2

i1

i0

1B50H–1B5FH

Flags:

E

I

C

Z

↓

–

–

↕

Mode:

Src: Immediate data

Dst: Register direct

Extended addressing: Invalid

112 EPSON S1C63000 CORE CPU MANUAL