Epson S1C63000 LD [%ir]+,imm4, LD [%ir],[%ir’], Code:, Mode:, Code:, Mode:, Flags:, Flags:, 2 cycles, Function:, Function: [ir] ←

CHAPTER 4: INSTRUCTION SET

LD [%ir]+,imm4

Load immediate data imm4 into location [ir reg.] and increment ir reg. 1 cycle

Function: [ir] ←

imm4, ir ←

ir + 1

Loads the 4-bit immediate data imm4 into the data memory addressed by the ir register (X or

Y). Then increments the ir register (X or Y).

Code:

Mnemonic

MSB

LSB

LD [%X]+,imm4

1

1

1

1

0

1

0

0

1

i3

i2

i1

i0

1E90H–1E9FH

LD [%Y]+,imm4

1

1

1

1

0

1

0

1

1

i3

i2

i1

i0

1EB0H–1EBFH

Flags:

E

I

C

Z

↓

–

–

–

Mode:

Src: Immediate data

Dst: Register indirect

Extended addressing: Invalid

LD [%ir],[%ir’]	Load location [ir’ reg.] into location [ir reg.]	2 cycles
Function: [ir] ← [ir’]

Loads the content of the data memory addressed by the ir’ register (X or Y) into the data memory addressed by the ir register (Y or X).

Code:	Mnemonic		MSB														LSB
	LD [%X],[%Y]			1		1	1	1	0	1	1	1	1	1	0	1		0	1EFAH
	LD [%Y],[%X]			1		1	1	1	0	1	1	1	1	1	0	0		0	1EF8H
Flags:	E	I	C		Z
	↓	–	–		–
Mode:	Src: Register indirect
	Dst: Register indirect
	Extended addressing: Invalid

S1C63000 CORE CPU MANUAL EPSON 103