Epson S1C63000 ADD [%ir]+,imm4, ADD %ir,%BA, 1 cycle, Add BA reg. to ir reg, Add immediate data imm4 to location [ir reg.] and increment ir reg. 2 cycles

CHAPTER 4: INSTRUCTION SET

ADD [%ir]+,imm4

Add immediate data imm4 to location [ir reg.] and increment ir reg. 2 cycles

Function: [ir] ←

[ir] + imm4, ir ←

ir + 1

Adds the 4-bit immediate data imm4 to the data memory addressed by the ir register (X or Y).

Then increments the ir register (X or Y). The flags change due to the operation result of the data

memory and the increment result of the ir register does not affect the flags.

Code:

Mnemonic

MSB

LSB

ADD [%X]+,imm4

1

1

0

0

1

0

0

0

1

i3

i2

i1

i0

1910H–191FH

ADD [%Y]+,imm4

1

1

0

0

1

0

0

1

1

i3

i2

i1

i0

1930H–193FH

Flags:

E

I

C

Z

↓

–

↕

↕

Mode:

Src: Immediate data

Dst: Register indirect

Extended addressing: Invalid

ADD %ir,%BA	Add BA reg. to ir reg.	1 cycle
Function: ir ← ir + BA

Adds the content of the BA register to the ir register (X or Y). This instruction does not affect the C flag regardless of the operation result.

Code:	Mnemonic			MSB														LSB
	ADD %X,%BA				1		1	1	1	1	1	1	0	1	0	0	0		X	1FD0H, (1FD1H)
	ADD %Y,%BA				1		1	1	1	1	1	1	0	1	0	0	1		X	1FD2H, (1FD3H)
Flags:	E	I	C			Z
	↓	–	–			↕
Mode:	Src: Register direct
	Dst: Register direct
	Extended addressing: Invalid

72 EPSON S1C63000 CORE CPU MANUAL