Epson S1C63000 ADC %r,%r, ADC %r,imm4, Code:, Mode:, Code:, Mode:, Flags:, Flags:, 1 cycle, 1 cycle, Function:, Function: r ←, Add with carry r' reg. to r reg

		CHAPTER 4: INSTRUCTION SET
ADC %r,%r'	Add with carry r' reg. to r reg.	1 cycle
Function: r ← r + r' + C

Adds the content of the r' register (A or B) and carry (C) to the r register (A or B).

Code:	Mnemonic			MSB														LSB
	ADC %A,%A				1		1	0	0	1	1	1	1	1	0	0	0		X	19F0H, (19F1H)
	ADC %A,%B				1		1	0	0	1	1	1	1	1	0	0	1		X	19F2H, (19F3H)
	ADC %B,%A				1		1	0	0	1	1	1	1	1	0	1	0		X	19F4H, (19F5H)
	ADC %B,%B				1		1	0	0	1	1	1	1	1	0	1	1		X	19F6H, (19F7H)
Flags:	E	I	C			Z
	↓	–	↕				↕
Mode:	Src: Register direct
	Dst: Register direct
	Extended addressing: Invalid

ADC %r,imm4

Add with carry immediate data imm4 to r reg.

1 cycle

Function: r ←

r + imm4 + C

Adds the 4-bit immediate data imm4 and carry (C) to the r register (A or B).

Code:

Mnemonic

MSB

LSB

ADC %A,imm4

1

1

0

0

1

1

1

0

0

i3

i2

i1

i0

19C0H–19CFH

ADC %B,imm4

1

1

0

0

1

1

1

0

1

i3

i2

i1

i0

19D0H–19DFH

Flags:

E

I

C

Z

↓

–

↕

↕

Mode:

Src: Immediate data

Dst: Register direct

Extended addressing: Invalid

S1C63000 CORE CPU MANUAL EPSON 61