Epson S1C63000 ALU alithmetic operation (3/3)

CHAPTER 4: INSTRUCTION SET

ALU alithmetic operation (3/3)

	Mnemonic					Machine code										Operation	Cycle		Flag			EXT.	Page
		12	11	10	9		8	7	6	5	4	3	2	1	0			E	I	C	Z	mode
CMP	[%X],%A	1	1	1	1	0		0	1	1	0	1 0 0 0				[X]-A	1	↓ –↔ ↔				●	86
	[%X],%B	1	1	1	1	0		0	1	1	0	1 1 0 0				[X]-B	1	↓ –↔ ↔				●	86
	[%X],imm4	1	1	1	1	0		0	0	0	0	i3 i2 i1 i0				[X]-imm4	1	↓ –↔ ↔				●	87
	[%X]+,%A	1	1	1	1	0		0	1	1	0	1 0 0 1				[X]-A, X ← X+1	1	↓ –↔ ↔				⋅	86
	[%X]+,%B	1	1	1	1	0		0	1	1	0	1 1 0 1				[X]-B, X ← X+1	1	↓ –↔ ↔				⋅	86
	[%X]+,imm4	1	1	1	1	0		0	0	0	1	i3 i2 i1 i0				[X]-imm4, X ← X+1	1	↓ –↔ ↔				⋅	87
CMP	[%Y],%A	1	1	1	1	0		0	1	1	0	1 0 1 0				[Y]-A	1	↓ –↔ ↔				●	86
	[%Y],%B	1	1	1	1	0		0	1	1	0	1 1 1 0				[Y]-B	1	↓ –↔ ↔				●	86
	[%Y],imm4	1	1	1	1	0		0	0	1	0	i3 i2 i1 i0				[Y]-imm4	1	↓ –↔ ↔				●	87
	[%Y]+,%A	1	1	1	1	0		0	1	1	0	1 0 1 1				[Y]-A, Y ← Y+1	1	↓ –↔ ↔				⋅	86
	[%Y]+,%B	1	1	1	1	0		0	1	1	0	1 1 1 1				[Y]-B, Y ← Y+1	1	↓ –↔ ↔				⋅	86
	[%Y]+,imm4	1	1	1	1	0		0	0	1	1	i3 i2 i1 i0				[Y]-imm4, Y ← Y+1	1	↓ –↔ ↔				⋅	87
INC	[00addr6]	1	0	0	0	0		0	1 a5 a4			a3 a2 a1 a0				[00addr6] ← [00addr6]+1	2	↓ –↔ ↔				⋅	92
DEC	[00addr6]	1	0	0	0	0		0	0 a5 a4			a3 a2 a1 a0				[00addr6] ← [00addr6]-1	2	↓ –↔ ↔				⋅	88
ADC	%B,%A,n4	1	0	0	0	0		1	1	0	1	[ 10H-n4 ]				B ← N's adjust (B+A+C)	2	↓ –↔ ↔				⋅	65
∗1	%B,[%X],n4	1	1	1	0	1		1	1	0	0	[ 10H-n4 ]				B ← N's adjust (B+[X]+C)	2	↓ –↔ ↔				●	65
	%B,[%X]+,n4	1	1	1	0	1		1	1	0	1	[ 10H-n4 ]				B ← N's adjust (B+[X]+C), X← X+1	2	↓ –↔ ↔				⋅	66
	%B,[%Y],n4	1	1	1	0	1		1	1	1	0	[ 10H-n4 ]				B ← N's adjust (B+[Y]+C)	2	↓ –↔ ↔				●	65
	%B,[%Y]+,n4	1	1	1	0	1		1	1	1	1	[ 10H-n4 ]				B ← N's adjust (B+[Y]+C), Y← Y+1	2	↓ –↔ ↔				⋅	66
ADC	[%X],%B,n4	1	1	1	0	1		0	1	0	0	[ 10H-n4 ]				[X] ← N's adjust ([X]+B+C)	2	↓ –↔ ↔				●	66
∗1	[%X],0,n4	1	1	1	0	1		0	0	0	0	[ 10H-n4 ]				[X] ← N's adjust ([X]+0+C)	2	↓ –↔ ↔				●	67
	[%X]+,%B,n4	1	1	1	0	1		0	1	0	1	[ 10H-n4 ]				[X] ← N's adjust ([X]+B+C), X← X+1	2	↓ –↔ ↔				⋅	67
	[%X]+,0,n4	1	1	1	0	1		0	0	0	1	[ 10H-n4 ]				[X] ← N's adjust ([X]+0+C), X← X+1	2	↓ –↔ ↔				⋅	68
ADC	[%Y],%B,n4	1	1	1	0	1		0	1	1	0	[ 10H-n4 ]				[Y] ← N's adjust ([Y]+B+C)	2	↓ –↔ ↔				●	66
∗1	[%Y],0,n4	1	1	1	0	1		0	0	1	0	[ 10H-n4 ]				[Y] ← N's adjust ([Y]+0+C)	2	↓ –↔ ↔				●	67
	[%Y]+,%B,n4	1	1	1	0	1		0	1	1	1	[ 10H-n4 ]				[Y] ← N's adjust ([Y]+B+C), Y← Y+1	2	↓ –↔ ↔				⋅	67
	[%Y]+,0,n4	1	1	1	0	1		0	0	1	1	[ 10H-n4 ]				[Y] ← N's adjust ([Y]+0+C), Y← Y+1	2	↓ –↔ ↔				⋅	68
SBC	%B,%A,n4	1	0	0	0	0		1	1	0	0	n3 n2 n1 n0				B ← N's adjust (B-A-C)	2	↓ –↔ ↔				⋅	127
∗1	%B,[%X],n4	1	1	1	0	0		1	1	0	0	n3 n2 n1 n0				B ← N's adjust (B-[X]-C)	2	↓ –↔ ↔				●	128
	%B,[%X]+,n4	1	1	1	0	0		1	1	0	1	n3 n2 n1 n0				B ← N's adjust (B-[X]-C), X← X+1	2	↓ –↔ ↔				⋅	128
	%B,[%Y],n4	1	1	1	0	0		1	1	1	0	n3 n2 n1 n0				B ← N's adjust (B-[Y]-C)	2	↓ –↔ ↔				●	128
	%B,[%Y]+,n4	1	1	1	0	0		1	1	1	1	n3 n2 n1 n0				B ← N's adjust (B-[Y]-C), Y← Y+1	2	↓ –↔ ↔				⋅	128
SBC	[%X],%B,n4	1	1	1	0	0		0	1	0	0	n3 n2 n1 n0				[X] ← N's adjust ([X]-B-C)	2	↓ –↔ ↔				●	129
∗1	[%X],0,n4	1	1	1	0	0		0	0	0	0	n3 n2 n1 n0				[X] ← N's adjust ([X]-0-C)	2	↓ –↔ ↔				●	130
	[%X]+,%B,n4	1	1	1	0	0		0	1	0	1	n3 n2 n1 n0				[X] ← N's adjust ([X]-B-C), X← X+1	2	↓ –↔ ↔				⋅	129
	[%X]+,0,n4	1	1	1	0	0		0	0	0	1	n3 n2 n1 n0				[X] ← N's adjust ([X]-0-C), X← X+1	2	↓ –↔ ↔				⋅	130
SBC	[%Y],%B,n4	1	1	1	0	0		0	1	1	0	n3 n2 n1 n0				[Y] ← N's adjust ([Y]-B-C)	2	↓ –↔ ↔				●	129
∗1	[%Y],0,n4	1	1	1	0	0		0	0	1	0	n3 n2 n1 n0				[Y] ← N's adjust ([Y]-0-C)	2	↓ –↔ ↔				●	130
	[%Y]+,%B,n4	1	1	1	0	0		0	1	1	1	n3 n2 n1 n0				[Y] ← N's adjust ([Y]-B-C), Y← Y+1	2	↓ –↔ ↔				⋅	129
	[%Y]+,0,n4	1	1	1	0	0		0	0	1	1	n3 n2 n1 n0				[Y] ← N's adjust ([Y]-0-C), Y← Y+1	2	↓ –↔ ↔				⋅	130
INC	[%X],n4	1	1	1	0	1		1	0	0	0	[ 10H-n4 ]				[X] ← N's adjust ([X]+1)	2	↓ –↔ ↔				●	93
∗1	[%X]+,n4	1	1	1	0	1		1	0	0	1	[ 10H-n4 ]				[X] ← N's adjust ([X]+1), X← X+1	2	↓ –↔ ↔				⋅	93
INC	[%Y],n4	1	1	1	0	1		1	0	1	0	[ 10H-n4 ]				[Y] ← N's adjust ([Y]+1)	2	↓ –↔ ↔				●	93
∗1	[%Y]+,n4	1	1	1	0	1		1	0	1	1	[ 10H-n4 ]				[Y] ← N's adjust ([Y]+1), Y← Y+1	2	↓ –↔ ↔				⋅	93
DEC	[%X],n4	1	1	1	0	0		1	0	0	0	n3 n2 n1 n0				[X] ← N's adjust ([X]-1)	2	↓ –↔ ↔				●	89
∗1	[%X]+,n4	1	1	1	0	0		1	0	0	1	n3 n2 n1 n0				[X] ← N's adjust ([X]-1), X← X+1	2	↓ –↔ ↔				⋅	89
DEC	[%Y],n4	1	1	1	0	0		1	0	1	0	n3 n2 n1 n0				[Y] ← N's adjust ([Y]-1)	2	↓ –↔ ↔				●	89
∗1	[%Y]+,n4	1	1	1	0	0		1	0	1	1	n3 n2 n1 n0				[Y] ← N's adjust ([Y]-1), Y← Y+1	2	↓ –↔ ↔				⋅	89

∗1 "n4" should be specified with a value between 1 and 16 that indicates a radix.

In the ADC and INC instructions, the assembler converts the "n4" into a complement, and places it at the low-order 4 bits in the machine code.

In the SBC and DEC instructions, the "n4" is placed as it is at the low-order 4 bits in the machine code. (However, when 16 is specified to n4, the machine code is generated with 0000H as the low-order 4 bits.)

S1C63000 CORE CPU MANUAL EPSON 43