CHAPTER 4: INSTRUCTION SET

HALT

Set CPU to HALT mode

2 cycles

Function: Halt

Sets the CPU to HALT status.

The CPU stops operating, thus the power consumption is reduced. Peripheral circuits such as the oscillation circuit still operate.

An interrupt causes it to return from HALT status to the normal program execution status.

Code:

Mnemonic

 

MSB

 

 

 

 

 

 

 

 

 

 

LSB

 

 

HALT

 

 

1

 

1

1

1

1

1

1

1

1

1

1

0

 

0

1FFCH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Flags:

E

 

I

C

 

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

↓

 

–

–

 

–

 

 

 

 

 

 

 

 

 

 

 

 

 

INC [addr6]

Increment location [addr6]

2 cycles

Function: [addr6] ←

[addr6] + 1

 

(addr6 = 0000H–003FH)

Increments (+1) the content of the data memory addressed by the addr6.

Code:

Mnemonic

 

MSB

 

 

 

 

 

 

 

LSB

 

INC [addr6]

 

1

 

0

0

0

0

0

1

a5

a4

a3

a2

a1

a0

1040H–107FH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Flags:

E

 

I

C

 

Z

 

 

 

 

 

 

 

 

 

 

 

 

↓

 

–

↕

 

 

↕

 

 

 

 

 

 

 

 

 

 

 

 

Mode:

6-bit absolute

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Extended addressing: Invalid

 

 

 

 

 

 

 

 

 

 

92

EPSON

S1C63000 CORE CPU MANUAL