Epson S1C63000 OR [%ir]+,imm4, POP %r, 1 cycle, Pop top of stack into r reg, ir +1, 1FEFH, 1FEEH, 1FEDH, [ir] ←, SP2 +1, POP %A, POP %B, POP %F, (r = F), (r = A, B)

CHAPTER 4: INSTRUCTION SET

OR [%ir]+,imm4

Logical OR of immediate data imm4 and location [ir reg.] and increment ir reg. 2 cycles

Function: [ir] ←

[ir] ∨ imm4, ir ←

ir +1

Performs a logical OR operation of the 4-bit immediate data imm4 and the content of the data

memory addressed by the ir register (X or Y), and stores the result in that address. Then

increments the ir register (X or Y). The flags change due to the operation result of the data

memory and the increment result of the ir register does not affect the flags.

Code:

Mnemonic

MSB

LSB

OR [%X]+,imm4

1

1

0

1

1

0

0

0

1

i3

i2

i1

i0

1B10H–1B1FH

OR [%Y]+,imm4

1

1

0

1

1

0

0

1

1

i3

i2

i1

i0

1B30H–1B3FH

Flags:

E

I

C

Z

↓

–

–

↕

Mode:

Src: Immediate data

Dst: Register indirect

Extended addressing: Invalid

POP %r			Pop top of stack into r reg.																	1 cycle
Function: r ← [SP2], SP2 ←			SP2 +1
	Loads the 4-bit data that has been stored in the address indicated by the stack pointer SP2 into
	the r register (A, B or F), then increments the SP2.
Code:	Mnemonic			MSB													LSB
	POP %A				1	1	1	1	1	1	1	1	0	1	1	1		1	1FEFH
	POP %B				1	1	1	1	1	1	1	1	0	1	1	1		0	1FEEH
	POP %F				1	1	1	1	1	1	1	1	0	1	1	0		1	1FEDH
Flags:	E	I	C		Z
	↓	–	–		–		(r = A, B)
	↕	↕	↕			↕	(r = F)
Mode:	Register direct
	Extended addressing: Invalid

116 EPSON S1C63000 CORE CPU MANUAL