CHAPTER 2: ARCHITECTURE

(2)Instruction with a 4-bit A register data that specifies a relative address

JR %A

This instruction branches the program sequence with the content of the A register as an unsigned 4-bit relative address. The range that can be branched is from the next instruction address +0 to +15 (absolute value in the A register). This instruction is useful when operation results are used as the 4-bit relative addresses.

Example:

LD

%A,4

 

JR

%A

...Jumps to the instruction 5 steps after

(3)Instruction with an 8-bit BA register data that specifies a relative address

JR %BA

This instruction branches the program sequence with the content of the BA register as an unsigned 8-bit relative address ( the B register data becomes the high-order 4 bits). The range that can be branched is from the next instruction address +0 to +255 (absolute value in the BA register). This instruction is useful when operation results are used as the 8-bit relative addresses.

Example:

LDB

%BA,29

 

JR

%BA

...Jumps to the instruction 30 steps after

(4)Instruction with a data memory address within 0000H to 003FH in which the content specifies a 4-bit relative address

JR [addr6]

This instruction branches the program sequence with the content of the data memory specified by the [addr6] as an unsigned 4-bit relative address. The operand [addr6] can specify a data memory address within 0000H to 003FH. The range that can be branched is from the next instruction address +0 to +15 (absolute value in the specified data memory). For the data memory area that is specified with [addr6], bit operation instructions (CLR, SET, TST) are provided so that various flags can be set simply. This jump instruction can be used as a conditional jump according to these flags.

Example: When the content of the address 0010H is 4 (0100B).

SET

[0x0010],0

...Sets the bit 0 in the address 0010H to "1" ([0010H] = 5)

JR

[0x0010]

...Jumps to the instruction 6 steps after

Indirect jump instruction (JP)

The indirect jump instruction "JP %Y" loads the content of the Y register into the PC to branch to that address unconditionally. This instruction can branch entire 64K program memory because the 16-bit data in the Y register becomes a branch destination address as it is.

Example:

 

LDB

%EXT,0x24

 

LDB

%YL,0x00

...Y = 2400H

JP

%Y

...Jumps to the address 2400H

Figure 2.2.3.1 shows the operation of the jump instructions and the branch range.

S1C63000 CORE CPU MANUAL

EPSON

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