Epson S1C63000 SBC %r,[%ir]+, SBC [%ir],%r, 2 cycles, Subtract with carry r reg. from location [ir reg.]

CHAPTER 4: INSTRUCTION SET

SBC %r,[%ir]+

Subtract with carry location [ir reg.] from r reg. and increment ir reg. 1 cycle

Function: r ←		r - [ir] - C, ir ←			ir + 1
	Subtracts the content of the data memory addressed by the ir register (X or Y) and carry (C)
	from the r register (A or B). Then increments the ir register (X or Y). The flags change due to the
	operation result of the r register and the increment result of the ir register does not affect the
	flags.
Code:	Mnemonic				MSB														LSB
	SBC %A,[%X]+					1		1	0	0	0	1	1	1	0	0	0	0		1	18E1H
	SBC %A,[%Y]+					1		1	0	0	0	1	1	1	0	0	0	1		1	18E3H
	SBC %B,[%X]+					1		1	0	0	0	1	1	1	0	0	1	0		1	18E5H
	SBC %B,[%Y]+					1		1	0	0	0	1	1	1	0	0	1	1		1	18E7H
Flags:	E		I	C		Z
	↓		–	↕			↕
Mode:	Src: Register indirect
	Dst: Register direct
	Extended addressing: Invalid

SBC [%ir],%r	Subtract with carry r reg. from location [ir reg.]	2 cycles
Function: [ir] ← [ir] - r - C

Subtracts the content of the r register (A or B) and carry (C) from the data memory addressed by the ir register (X or Y).

Code:	Mnemonic			MSB														LSB
	SBC [%X],%A				1		1	0	0	0	1	1	1	0	1	0	0		0	18E8H
	SBC [%X],%B				1		1	0	0	0	1	1	1	0	1	1	0		0	18ECH
	SBC [%Y],%A				1		1	0	0	0	1	1	1	0	1	0	1		0	18EAH
	SBC [%Y],%B				1		1	0	0	0	1	1	1	0	1	1	1		0	18EEH
Flags:	E	I	C			Z
	↓	–	↕				↕
Mode:	Src: Register direct
	Dst: Register indirect
	Extended addressing: Valid
Extended	LDB	%EXT,imm8
operation: SBC		[%X],%r			[00imm8] ←					[00imm8] - r - C (00imm8 = 0000H + 00H to FFH)
	LDB	%EXT,imm8
	SBC	[%Y],%r			[FFimm8] ←					[FFimm8] - r - C (FFimm8 = FF00H + 00H to FFH)

S1C63000 CORE CPU MANUAL EPSON 125