
CHAPTER 2: ARCHITECTURE
•Accessing for addresses 0000H to 003FH
Data in this area is used for a relative address by the "JR [addr6]" and "CALR [addr6]" explained in Section 2.2.3. This area is suitable for setting up various flags and counters since the bit operation instructions (CLR, SET, TST) and increment/decrement instructions (INC, DEC) are provided for accessing this area.
•Accessing for addresses FFC0H to FFFFH (I/O memory area)
The bit operation instructions (CLR, SET, TST) are provided for accessing this area. Therefore, control bits in the I/O memory can be operated simply.
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CLR | [0xFFC0],0 | ...Clears the D0 bit in the I/O memory address FFC0H to "0" |
SET | [0xFFD2],3 | ...Sets the D3 bit in the I/O memory address FFD2H to "1" |
2.3.3 Stack and stack pointer
The stack is a memory that is accessed in the LIFO (Last In, First Out) format and is allocated to the RAM area of the address 0000H to 03FFH. The stack area can be set from an optional address (toward the lower address) using the stack pointer.
The S1C63000 contains two stack pointers SP1 and SP2.
(1)Stack pointer SP1
The SP1 is used for the address data stack, and permits
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0 | 0 | 0 | 0 | 0 | 0 | 7 | SP1 | 0 | 0 | 0 | Stack pointer 1 |
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8 bits to be modified
Fig. 2.3.3.1 SP1 configuration
As shown in the figure, the D0, D1 and
This stack is used to evacuate return addresses when the call instructions are executed or the interrupts are generated. It is also used when the
The SP1 is decremented after the data is evacuated and is incremented when a return instruction is executed or after returning data by executing the POP instruction.
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1234H | CALR sign8 |
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1235H | : |
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| 00FFH | 5H |
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| 00FEH | 3H |
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| 00FDH | 2H |
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| 00FCH | 1H |
| 3FH | (= Address FCH) | |
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| 40H | (= Address 100H) | |
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| 00FFH | 5H |
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| 00FEH | 3H |
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| RET |
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| 00FCH | 1H |
| 3FH | (= Address FCH) | |
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Fig. 2.3.3.2 Address stack operation
S1C63000 CORE CPU MANUAL | EPSON | 19 |