Paradyne 336x E1 manual Table C-6 General Configuration Options, Clock Rate Next 2048 8 Prev

ACCULINK 336x E1 NTU

General Configuration Options

Table C-6

General Configuration Options

Pri Clk Src: NET

Next NET DTE Prt1 Prt2 Prt3 Prt4 Int Ext Prev

Primary Clock Source. Specifies the primary clock source for the E1 NTU. This selection synchronizes all internal timing and external interface clocks. Failure of the clock specified by this selection results in automatic fallback to the secondary clock source.

NET ± Configures the HDSL Network interface as the primary clock source.

DTE ± Configures the G.703 DTE interface as the primary clock source. This selection is not available if the G.703 DTE interface is disabled. If the G.703 DTE interface is disabled after making this selection, the primary clock source is changed to NET.

Prt1, 2, 3, 4 ± Configures data port 1, 2, 3, or 4 as the primary clock source. Set the same port's Transmit Clock to External. If you enable EDL for the same port, the external device must provide clocking of 8 kbps less than the expected data port rate. For example, if you select 64 kbps, the external clock must supply a 56 kbps clock signal. This selection is only available on 2-port and 4-port E1 NTUs.

Int ± Configures the internal clock as the primary clock source.

Ext ± Configures an external clock (provided through the Clock In connector) as the primary clock source. This selection is only available on 2-port and 4-port E1 NTUs.

NOTE: For 2-port E1 NTUs, only Ports 1 and 2 are available.

Sec Clk Src: NET

Next NET DTE Prt1 Prt2 Prt3 Prt4 Ext Disab Prev

Secondary Clock Source. Specifies the secondary clock source for the E1 NTU. Failure of the clock specified by the Primary Clock Source selection results in automatic fallback to the secondary clock source. When this occurs, this selection synchronizes all internal timing and external interface clocks. Failure of the clock specified by the Secondary Clock Source selection results in automatic fallback to internal clock.

NET ± Configures the HDSL Network interface as the secondary clock source.

DTE ± Configures the G.703 DTE interface as the secondary clock source. This selection is not available if the G.703 DTE interface is disabled. If the G.703 DTE interface is disabled after making this selection, the secondary clock source is changed to NET.

Prt1, 2, 3, 4 ± Configures data port 1, 2, 3, or 4 as the secondary clock source. Set the same port's Transmit Clock to External. If you enable EDL for the same port, the external device must provide clocking of 8 kbps less than the expected data port rate. For example, if you select 64 kbps, the external clock must supply a 56 kbps clock signal.

Ext ± Configures an external clock (provided through the Clock In connector) as the secondary clock source.

Disab ± Disables the secondary clock source. Failure of the primary clock source results in automatic fallback to the internal clock.

NOTE: This configuration option is only available on 2-port and 4-port E1 NTUs.

NOTE: For 2-port E1 NTUs, only Ports 1 and 2 are available.

Clock Rate: 2048

Next 2048 8 Prev

External Clock Rate. Specifies the clock rate when the primary or secondary clock source is configured for external clock (Ext). This configuration option does not appear when the clock source is not an external clock.

2048 ± Sets the input rate of the external clock to 2,048 kHz.

8 ± Sets the input rate of the external clock to 8 kHz.

NOTE: This configuration option is only available on 2-port and 4-port E1 NTUs.

C-12 December 1996 3360-A2-GB20-20