Samsung S3C84E5 user manual BOR Bit or, Bor

INSTRUCTION SET S3C84E5/C84E9/P84E9

BOR — Bit OR

BOR	dst,src.b
BOR	dst.b,src
Operation:	dst(0)	← dst(0)	OR	src(b)
		or
	dst(b)	← dst(b)	OR	src(0)

The specified bit of the source (or the destination) is logically ORed with bit zero (LSB) of the destination (or the source). The resulting bit value is stored in the specified bit of the destination. No other bits of the destination are affected. The source is unaffected.

Flags:	C:	Unaffected.
	Z: Set if the result is "0"; cleared otherwise.
	S:	Cleared to "0".
	V:	Undefined.
	D:	Unaffected.
	H:	Unaffected.

Format:
						Bytes	Cycles	Opcode	Addr Mode
								(Hex)	dst	src
		opc		dst b 0	src	3	6	07	r0	Rb
		opc		src b 1	dst	3	6	07	Rb	r0
	NOTE: In the second byte of the 3 -byte instruction format, the destination (or the source)
			address is four bits, the bit address “b” is three bits, and the LSB address value is one bit.
Examples:	Given:		R1 = 07H and register 01H			= 03H:
	BOR			R1, 01H.1	→	R1 = 07H, register 01H = 03H
	BOR			01H.2, R1	→	Register 01H = 07H, R1 = 07H
	In the first example, the destination working register R1 contains the value 07H (00000111B) and the
	source register 01H the value 03H (00000011B). The statement "BOR							R1,01H.1" logically		ORs bit
	one of the register 01H (source) with bit zero of R1 (destination). This leaves the same value (07H) in
	the working register R1.

In the second example, the destination register 01H contains the value 03H (00000011B) and the source working register R1 the value 07H (00000111B). The statement "BOR 01H.2,R1" logically ORs bit two of the register 01H (destination) with bit zero of R1 (source). This leaves the value 07H in the register 01H.

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