INTERRUPT STRUCTURE

S3C84E5/C84E9/P84E9

 

 

Levels

IRQ0

IRQ1

IRQ2

IRQ3

IRQ4

IRQ5

IRQ6

IRQ7

 

 

Vectors

Sources

Reset(Clear)

 

 

BEH

Timer B underflow

H/W

 

 

C0H

Timer A match/capture

H/W, S/W

 

 

 

C2H

Timer A overflow

H/W, S/W

 

 

 

 

 

 

C4H

Timer 1(0) match/capture

H/W, S/W

 

 

 

 

C6H

Timer 1(0) overflow

H/W, S/W

 

 

C8H

Timer 1(1) match/capture

H/W, S/W

 

 

CAH

Timer 1(1) overflow

H/W, S/W

 

 

 

 

 

 

 

CCH

Watch timer

S/W

 

 

CEH

P2.0 external interrupt

S/W

 

 

 

 

D0H

P2.1 external interrupt

S/W

 

 

D2H

P2.2 external interrupt

S/W

 

 

D4H

P2.3 external interrupt

S/W

 

 

 

 

D6H

P2.4 external interrupt

S/W

 

 

 

 

D8H

P2.5 external interrupt

S/W

 

 

DAH

P2.6 external interrupt

S/W

 

 

DCH

P2.7 external interrupt

S/W

 

 

 

 

DEH

P4.0 external interrupt

S/W

 

 

 

 

E0H

P4.1 external interrupt

S/W

 

 

E2H

P4.2 external interrupt

S/W

 

 

 

 

E4H

UART data receive

S/W

 

 

 

 

E6H

UART data transmit

S/W

 

 

NOTES:

1.Within a given interrupt level, the lower vector address has high priority. For example, DCH has higher priority than DEH within the level IRQ5 the priorities within each level are set at the factory.

2.External interrupts are triggered by a rising or falling edge, depending on the corresponding control register setting.

Figure 5-2. S3C84E5/C84E9/P84E9 Interrupt Structure

5-4

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Image 114
Samsung S3C84E5 user manual Levels, Vectors Sources ResetClear