S3C84E5/C84E9/P84E9

I/O PORTS

 

 

Port 3 Control Register, Low Byte (P3CONL)

EFH, Set1, Bank0, R/W, Reset value="00"

MSB

.7

.6

.5

.4

.3

.2

.1

.0

 

 

 

 

 

 

 

 

 

[.7-.6] P3.3/ADC3 Configuration Bits

00 = Input mode with pull-up

01 = Input mode

10 = Push-pull output mode

1 1 = Alternative function mode: ADC3 input

[.5-.4] P3.2/ADC2 Configuration Bits

00 = Input mode with pull-up

01 = Input mode

10 = Push-pull output mode

1 1 = Alternative function mode: ADC2 input

[.3-.2] P3.1/ADC1 Configuration Bits

00 = Input mode with pull-up

01 = Input mode

10 = Push-pull output mode

1 1 = Alternative function mode: ADC1 input

[.1-.0] P3.0/ADC0 Configuration Bits

00 = Input mode with pull-up

01 = Input mode

10 = Push-pull output mode

1 1 = Alternative function mode: ADC0 input

LSB

Figure 9-10. Port 3 Low-Byte Control Register (P3CONL)

9-13

Page 237
Image 237
Samsung S3C84E5 user manual P3.3/ADC3 Configuration Bits, P3.2/ADC2 Configuration Bits, P3.1/ADC1 Configuration Bits