Samsung S3C84E5 Figure 9-4. Port 1 Low-Byte Control Register (P1CONL)

I/O PORTS S3C84E5/C84E9/P84E9
9-6
Port 1 Control Register, Low Byte (P1CONL)
E9H, Set1, Bank0, R/W, Reset value="00H"
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
[.7-.6] P1.3/BZOUT Configuration Bits
0 0 = Input mode with pull-up
0 1 = Input mode
1 0 = Push-pull output mode
1 1 = Alternative function mode: BZOUT output
[.5-.4] P1.2/T1OUT0 Configuration Bits
0 0 = Input mode with pull-up
0 1 = Input mode
1 0 = Push-pull output mode
1 1 = Alternative function mode: T1OUT0 output
[.3-.2] P1.1/T1CK0 Configuration Bits
0 0 = Input mode with pull-up; T1CK0 input
0 1 = Input mode; T1CK0 input
1 X = Push-pull output mode
[.1-.0] P1.0/TAOUT Configuration Bits
0 0 = Input mode with pull-up
0 1 = Input mode
1 0 = Push-pull output mode
1 1 = Alternative function mode: TAOUT output
Figure 9-4. Port 1 Low-Byte Control Register (P1CONL)