Samsung S3C84E5 user manual P0CONL Port 0 Control Register Low Byte E7H Set 1, Bank

S3C84E5/C84E9/P84E9CONTROL REGISTER

P0CONL — Port 0 Control Register (Low Byte) E7H Set 1, Bank 0

Bit Identifier

Reset Value

Read/Write Addressing Mode

.7–.6

.7		.6	.5	.4	.3	.2	1	.0
0	0		0	0	1	1	1	1
R/W		R/W	R/W	R/W	R/W	R/W	R/W	R/W
Register addressing mode only
P0.3/T1CK1 Configuration Bits
0	0 Input mode with pull-up; T1CK1 input

01 Input mode; T1CK1 input

1X Push-pull output mode

.5–.4	P0.2/T1CAP1 Configuration Bits
	0	0	Input mode with pull-up; T1CAP1 input
	0	1	Input mode; T1CAP1 input
	1	X	Push-pull output mode

.3–.2	P0.1/XTout Configuration Bits
	0	0	Input mode with pull-up
	0	1	Input mode
	1	0	Push-pull output mode
	1	1	Alternative function mode: Sub oscillator output (XTout)

.1–.0	P0.0/XTin Configuration Bits
	0	0	Input mode with pull-up
	0	1	Input mode
	1	0	Push-pull output mode
	1	1	Alternative function mode: Sub oscillator input (XTin)

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