Samsung S3C84E5 TIMER B CONTROL REGISTER (TBCON) , Figure 11-4. Timer B Control Register (TBCON) , Figure 11-5. Timer B Data Registers (TBDATAH, TBDATAL)

8-BIT TIMER A/B S3C84E5/C84E9/P84E9
11-6
TIMER B CONTROL REGISTER (TBCON)
Timer B Control Register (TBCON)
D0H, Set 1, Bank 0, R/W
LSBMSB .7 .6 .5 .4 .3 .2 .1 .0
Timer B mode selection bit:
0 = One-shot mode
1 = Repeating mode
Timer B input clock selection bit:
00 = fxx/4
01 = fxx/8
10 = fxx/64
11 = fxx/256
Timer B interrupt time selection bit:
00 = Elapsed time for low data value
01 = Elapsed time for high data value
10 = Elapsed time for low and high data value
11 = Invaild setting
Timer B start/stop bit:
0 = Stop timer B
1 = Start timer B
Timer B interrupt enable bit:
0 = Disable interrupt
1 = Enable interrupt
Timer B output flip-flop
control bit:
0 = T-FF is low
1 = T-FF is high
Figure 11-4. Timer B Control Register (TBCON)
Timer B Data High-Byte Register (TBDATAH)
D1H, Set 1, Bank 0, R/W
LSBMSB .7 .6 .5 .4 .3 .2 .1 .0
Reset Value: FFh
Timer B Data Low-Byte Register (TBDATAL)
D2H, Set 1, Bank 0, R/W
LSBMSB .7 .6 .5 .4 .3 .2 .1 .0
Reset Value: FFh
Figure 11-5. Timer B Data Registers (TBDATAH, TBDATAL)