S3C84E5/C84E9/P84E9CONTROL REGISTER

WTCON — Watch Timer Control Register

FAH Set 1, Bank 0

Bit Identifier

Reset Value

Read/Write Addressing Mode

.7

.6

.5–.4

.3–.2

.1

.0

.7

.6

.5

.4

.3

.2

.1

.0

 

 

 

 

 

 

 

 

0

0

0

0

0

0

0

0

R/W

R/W

R/W

R/W

R/W

R/W

R/W

R/W

Register addressing mode only

Watch Timer Clock Selection Bit

0Main system clock divided by 256 (fxx/256)

1Sub system clock (fxt)

Watch Timer Interrupt Enable Bit

0Disable watch timer interrupt

1Enable watch timer interrupt

Buzzer Signal Selection Bits

0

0 0.5 kHz buzzer (BZOUT) signal output

01 1 kHz buzzer (BZOUT) signal output

10 2 kHz buzzer (BZOUT) signal output

1

1

4 kHz buzzer (BZOUT) signal output

Watch Timer Speed Selection Bits

 

 

 

0

0

0.5 s Interval

01 0.25 s Interval

10 0.125 s Interval

1 1 1.955 ms Interval

Watch Timer Enable Bit

0Disable watch timer; Clear frequency dividing circuits

1Enable watch timer

Watch Timer Interrupt Pending Bit

0Interrupt is not pending

1Clear pending bit when write

1 Interrupt is pending

4-41

Page 110
Image 110
Samsung S3C84E5 user manual Wtcon Watch Timer Control Register FAH Set 1, Bank