Samsung S3C84E5 user manual Oscillator Control Register Osccon

CLOCK CIRCUITS3C84E5/C84E9/P84E9

Oscillator Control Register (OSCCON)

			FBH, Set 1, Bank 0, R/W
MSB	.7	.6	.5	.4	.3	.2	.1		.0		LSB
Not used (must keep always 0)							Not used			(must keep always 0)
								System clock selection bit:
								0 = Main oscillator select
								1 = Subsystem oscillator select
Subsystem oscillator driving
						Subsystem oscillator control bit:
ability control bit:
0 = Strong driving ability						0 = Subsystem oscillator RUN
1 = Normal driving ability						1 = Subsystem oscillator STOP

Mainsystem oscillator control bit: 0 = Mainsystem oscillator RUN

1 = Mainsystem oscillator STOP

NOTE: In strong mode the warm-up time is less than 100 ms.

When the CPU is operated with fxt (sub-oscillation clock), it is possible to use the stop instruction but in this case before using stop instruction, you must select fxx/128 for basic timer counter clock input.

Then the oscillation stabilization time is 62.5 ((1/32768) x 128 x 16) ms + 100 ms. Here the warm-up time is from the time that the stop release signal activates to the time that basic timer starts counting.

Figure 7-5. Oscillator Control Register (OSCCON)

MSB

STOP Control Register (STPCON)

E5H, Set 1,Bank 0, R/W

.7 .6 .5 .4 .3 .2 .1 .0

STOP Control bits:

Other values = Disable STOP instruction 10100101 = Enable STOP instruction

LSB

Figure 7-6. STOP Control Register (STPCON)

7-4