Sun Microsystems manual Vi Netra CP3260 Blade Server User’s Guide April

5.2.1 UltraSPARC T2 Processor 5–4

5.2.1.1Electronic Fuse 5–7

5.2.1.2Cores 5–8

5.2.1.3L2 Cache 5–8

5.2.1.4Memory Controller 5–8

5.2.1.5I/O Interface 5–8

5.2.2Memory Subsystem 5–9

5.2.2.1Memory Capacity 5–9

5.2.2.2Memory Speed 5–9

5.2.3I/O Subsystem 5–9

5.2.3.1 PCI Express Switch 5–10

5.2.3.2Base Interface 5–10

5.2.3.3Fabric Interface 5–10

5.2.3.4Common ARTM 5–10

5.2.4 Other ARTM Interfaces 5–11

	5.2.4.1	Serial Ports	5–11
	5.2.4.2	Ethernet Management Port			5–11
5.2.5	Front Panel I/O 5–11
	5.2.5.1	Ethernet Management Port			5–11
	5.2.5.2	Serial Port	5–11
	5.2.5.3	Dual USB Ports		5–12
5.2.6	Compact Flash Socket		5–12
5.2.7	Service Processor MPC885			5–12
	5.2.7.1	Field-Programmable Gate Array				5–12
5.2.8 Intelligent Platform Management Controller						5–13
	5.2.8.1	Intelligent Platform Management Bus 5–14
	5.2.8.2	Interface to the PPC 5–14
	5.2.8.3	IPMB-L Interface		5–14

vi Netra CP3260 Blade Server User’s Guide • April 2009