Sun Microsystems CP3260 manual System Firmware

4.1System Firmware

The Netra CP3260 blade server contains a modular firmware architecture that gives you latitude in controlling boot initialization. You can customize the initialization, test the firmware, and even enable the installation of a custom operating system.

This platform also employs the Intelligent Platform Management Controller (IPMC)—described in Section 5.2.8, “Intelligent Platform Management Controller” on page 5-13—which controls the system management, hot-swap control, and some board hardware. The IPMC configuration is controlled by separate firmware.

The Netra CP3260 blade server boots from the 4-Mbyte system flash PROM device that includes the power-on self-test (POST) and OpenBoot™ firmware.

A systems firmware progress sensor (SFPS) is available on the Sun Netra CP3260 blade server. The purpose of the sensor is to model the firmware running on the payload and provide various states to the external management software (ShMM on Netra CT 900 servers). This occurs via a standard IPMI event mechanism.

The firmware states are Progress, Hang, and Error, with various substates. The sensor generates an IPMI event message for each state. You can verify the messages by using clia sel command on the ShMM, through HPI event and SNMP traps for each state of a sensor event.

For more information, see Section B.4, “Send Sensor State Command” on page B-5.

For detailed sensor command syntax and options, refer to the Netra CT 900 Software Developer’s Guide (819-1178). (Even if you are using a third-party chassis, the SFPS commands and options apply, and this document is available online.)

http://docs.sun.com/app/docs/prod/n900.srvr#hic

4-2Netra CP3260 Blade Server User’s Guide • April 2009